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PIC24F04KA201 Datasheet(PDF) 165 Page - Microchip Technology |
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PIC24F04KA201 Datasheet(HTML) 165 Page - Microchip Technology |
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165 / 224 page ![]() © 2009 Microchip Technology Inc. Preliminary DS39937B-page 163 PIC24F04KA201 FAMILY 23.0 SPECIAL FEATURES PIC24F04KA201 family devices include several features intended to maximize application flexibility and reliability, and minimize cost through elimination of external components. These are: • Flexible Configuration • Watchdog Timer (WDT) • Code Protection • In-Circuit Serial Programming™ (ICSP™) • In-Circuit Emulation 23.1 Configuration Bits The Configuration bits can be programmed (read as ‘0’), or left unprogrammed (read as ‘1’), to select various device configurations. These bits are mapped starting at program memory location, F80000h. A complete list is provided in Table 23-1. A detailed explanation of the various bit functions is provided in Register 23-1 through Register 23-7. The address, F80000h, is beyond the user program memory space. In fact, it belongs to the configuration memory space (800000h-FFFFFFh), which can only be accessed using table reads and table writes. TABLE 23-1: CONFIGURATION REGISTERS LOCATIONS REGISTER 23-1: FGS: GENERAL SEGMENT CONFIGURATION REGISTER Note: This data sheet summarizes the features of this group of PIC24F devices. It is not intended to be a comprehensive reference source. For more information on the Watchdog Timer, High-Level Device Integration and Programming Diagnostics, refer to the individual sections of the “PIC24F Family Reference Manual” provided below : • Section 9. “Watchdog Timer (WDT)” (DS39697) • Section 36. “High-Level Integration with Programmable High/Low-Voltage Detect (HLVD)” (DS39725) • Section 33. “Programming and Diagnostics” (DS39716) Configuration Register Address FGS F80004 FOSCSEL F80006 FOSC F80008 FWDT F8000A FPOR F8000C FICD F8000E FDS F80010 U-0 U-0 U-0 U-0 U-0 U-0 R/C-1 R/C-1 — — — — — — GSS0 GWRP bit 7 bit 0 Legend: R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-2 Unimplemented: Read as ‘0’ bit 1 GSS0: General Segment Code Flash Code Protection bit 1 = No protection 0 = Standard security enabled bit 0 GWRP : General Segment Code Flash Write Protection bit 1 = General segment may be written 0 = General segment is write-protected |
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