PIC24F04KA201 datasheet(173/224 Pages) MICROCHIP

173 / 224 page

Preliminary

DS39937B-page 171

PIC24F04KA201 FAMILY

23.3

Deep Sleep Watchdog Timer

(DSWDT)

In PIC24F04KA201 family devices, in addition to the

WDT module, a DSWDT module is present which runs

while the device is in Deep Sleep, if enabled. It is

driven by either the SOSC or LPRC oscillator. The

clock source is selected by the Configuration bit,

DSWCKSEL (FDS<4>).

The DSWDT can be configured to generate a time-out at

2.1 ms to 25.7 days by selecting the respective

postscaler. The postscaler can be selected by the

Configuration bits, DSWDTPS<3:0> (FDS<3:0>). When

the DSWDT is enabled, the clock source is also enabled.

DSWDT is one of the sources that can wake-up the

device from Deep Sleep mode.

23.4

Program Verification and

Code Protection

For all devices in the PIC24F04KA201 family, code

protection for the general segment is controlled by the

Configuration bit, GSS0. This bit inhibits external reads

and writes to the program memory space; this has no

direct effect in normal execution mode.

Write protection is controlled by the GWRP bit for the

general segment in the Configuration Word. When this

bit is programmed to ‘0’, internal write and erase

operations to program memory are blocked.

23.5

In-Circuit Serial Programming

PIC24F04KA201 family microcontrollers can be

serially programmed while in the end application circuit.

This is simply done with two lines for clock (PGCx) and

data (PGDx) and three other lines for power, ground

and the programming voltage. This allows customers to

manufacture boards with unprogrammed devices and

then program the microcontroller just before shipping

the product. This also allows the most recent firmware

or a custom firmware to be programmed.

PIC24F04KA201 Datasheet(PDF) 173 Page - Microchip Technology

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