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PIC24F04KA201T-I/SS Datasheet(PDF) 219 Page - Microchip Technology |
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PIC24F04KA201T-I/SS Datasheet(HTML) 219 Page - Microchip Technology |
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219 / 224 page ![]() © 2009 Microchip Technology Inc. Preliminary DS39937B-page 217 PIC24F04KA201 FAMILY PMD ........................................................................... 36 PORTA ....................................................................... 33 PORTB ....................................................................... 33 SPI ............................................................................. 32 Timer .......................................................................... 31 UART ......................................................................... 32 Registers AD1CHS (A/D Input Select) ..................................... 148 AD1CON1 (A/D Control 1) ....................................... 145 AD1CON2 (A/D Control 2) ....................................... 146 AD1CON3 (A/D Control 3) ....................................... 147 AD1CSSL (A/D Input Scan Select, Low) ................. 149 AD1PCFG (A/D Port Configuration) ......................... 149 CLKDIV (Clock Divider) ............................................. 85 CMSTAT (Comparator Status) ................................. 156 CMxCON (Comparator x Control) ............................ 155 CORCON (Core Control) ........................................... 61 CORCON (CPU Control) ........................................... 23 CTMUCON (CTMU Control) .................................... 161 CTMUICON (CTMU Current Control) ...................... 162 CVRCON (Comparator Voltage Reference Control) .......................................... 158 DEVID (Device ID) ................................................... 169 DEVREV (Device Revision) ..................................... 169 DSCON (Deep Sleep Control) ................................... 95 DSWSRC (Deep Sleep Wake-up Source) ................. 96 FDS (Deep Sleep Configuration) ............................. 168 FGS (General Segment Configuration) .................... 163 FICD (In-Circuit Debugger Configuration) ................ 167 FOSC (Oscillator Configuration) .............................. 165 FOSCSEL (Oscillator Selection Configuration) ........ 164 FPOR (Reset Configuration) .................................... 167 FWDT (Watchdog Timer Configuration) .................. 166 HLVDCON (High/Low-Voltage Detect Control) ........ 142 I2C1CON (I2C1 Control) .......................................... 128 I2C1MSK (I2C1 Slave Mode Address Mask) ........... 132 I2C1STAT (I2C1 Status) .......................................... 130 IC1CON (Input Capture 1 Control) ........................... 110 IEC0 (Interrupt Enable Control 0) .............................. 67 IEC1 (Interrupt Enable Control 1) .............................. 68 IEC4 (Interrupt Enable Control 4) .............................. 69 IFS0 (Interrupt Flag Status 0) .................................... 64 IFS1 (Interrupt Flag Status 1) .................................... 65 IFS4 (Interrupt Flag Status 4) .................................... 66 INTCON1 (Interrupt Control 1) ................................... 62 INTTREG (Interrupt Control and Status) .................... 79 IPC0 (Interrupt Priority Control 0) .............................. 70 IPC1 (Interrupt Priority Control 1) .............................. 71 IPC16 (Interrupt Priority Control 16) .......................... 77 IPC18 (Interrupt Priority Control 18) .......................... 78 IPC19 (Interrupt Priority Control 19) .......................... 78 IPC2 (Interrupt Priority Control 2) .............................. 72 IPC3 (Interrupt Priority Control 3) .............................. 73 IPC4 (Interrupt Priority Control 4) .............................. 74 IPC5 (Interrupt Priority Control 5) .............................. 75 IPC7 (Interrupt Priority Control 7) .............................. 76 NVMCON (Flash Memory Control) ............................ 45 OC1CON (Output Compare 1 Control) .................... 115 OSCCON (Oscillator Control) .................................... 83 OSCTUN (FRC Oscillator Tune) ................................ 86 PADCFG1 (Pad Configuration Control) ........... 116, 132 RCON (Reset Control) ............................................... 52 REFOCON (Reference Oscillator Control) ................ 89 SPI1CON1 (SPI1 Control 1) .................................... 122 SPI1CON2 (SPI1 Control 2) .................................... 123 SPI1STAT (SPI1 Status and Control) ...................... 120 SR (ALU STATUS) .............................................. 22, 60 T1CON (Timer1 Control) ......................................... 102 T2CON (Timer2 Control) ......................................... 106 T3CON (Timer3 Control) ......................................... 107 U1MODE (UART1 Mode) ........................................ 136 U1RXREG (UART1 Receive) .................................. 140 U1STA (UART1 Status and Control) ....................... 138 U1TXREG (UART1 Transmit) ................................. 140 Resets Clock Source Selection ............................................. 53 Delay Times ............................................................... 54 Device Times ............................................................. 54 RCON Flags Operation ............................................. 53 SFR States ................................................................ 56 Revision History ............................................................... 213 S Selective Peripheral Power Control ................................... 97 Serial Peripheral Interface. See SPI. SFR Space ........................................................................ 28 Software Simulator (MPLAB SIM) ................................... 174 Software Stack .................................................................. 37 T Timer1 ............................................................................. 101 Timer2/3 .......................................................................... 103 Timing Diagrams CLKO and I/O .......................................................... 200 External Clock ......................................................... 198 Timing Requirements CLKO and I/O .......................................................... 200 External Clock ......................................................... 198 PLL Clock Specifications ......................................... 199 U UART ............................................................................... 133 Baud Rate Generator (BRG) ................................... 134 Break and Sync Transmit Sequence ....................... 135 IrDA Support ............................................................ 135 Operation of U1CTS and U1RTS Control Pins ........ 135 Receiving in 8-Bit or 9-Bit Data Mode ..................... 135 Transmitting in 8-Bit Data Mode .............................. 135 Transmitting in 9-Bit Data Mode .............................. 135 W Watchdog Timer Deep Sleep (DSWDT) ............................................. 171 Watchdog Timer (WDT) ................................................... 170 Windowed Operation ............................................... 170 WWW Address ................................................................ 218 WWW, On-Line Support ...................................................... 5 |
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