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PIC16F685-E/ML Datasheet(PDF) 302 Page - Microchip Technology |
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PIC16F685-E/ML Datasheet(HTML) 302 Page - Microchip Technology |
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302 / 306 page  PIC16F631/677/685/687/689/690 DS41262E-page 300 © 2008 Microchip Technology Inc. T2CON................................................................ 92 Timing Diagrams A/D Conversion......................................................... 256 A/D Conversion (Sleep Mode) .................................. 257 Asynchronous Reception .......................................... 158 Asynchronous Transmission..................................... 154 Asynchronous Transmission (Back to Back) ............ 154 Auto Wake-up Bit (WUE) During Normal Operation . 168 Auto Wake-up Bit (WUE) During Sleep .................... 169 Automatic Baud Rate Calibration .............................. 167 Brown-out Reset (BOR) ............................................ 244 Brown-out Reset Situations ...................................... 202 CLKOUT and I/O....................................................... 243 Clock Synchronization .............................................. 196 Clock Timing ............................................................. 241 Comparator Output ..................................................... 93 Enhanced Capture/Compare/PWM (ECCP) ............. 247 EUSART Synchronous Receive (Master/Slave) ....... 249 EUSART Synchronous Transmission (Master/Slave)................................................... 249 Fail-Safe Clock Monitor (FSCM) ................................. 58 Full-Bridge PWM Output ........................................... 138 Half-Bridge PWM Output .................................. 136, 144 I2C Bus Data ............................................................. 253 I2C Bus Start/Stop Bits.............................................. 252 I2C Reception (7-bit Address) ................................... 190 I2C Slave Mode (Transmission, 10-bit Address) ....... 194 I2C Slave Mode with SEN = 0 (Reception, 10-bit Ad- dress) ................................................................ 192 I2C Transmission (7-bit Address) .............................. 193 INT Pin Interrupt........................................................ 210 Internal Oscillator Switch Timing................................. 54 PWM Auto-shutdown Auto-restart Enabled ......................................... 143 Firmware Restart .............................................. 143 PWM Direction Change ............................................ 139 PWM Direction Change at Near 100% Duty Cycle ... 140 PWM Output (Active-High)........................................ 134 PWM Output (Active-Low) ........................................ 135 Reset, WDT, OST and Power-up Timer ................... 244 Send Break Character Sequence ............................. 170 Slave Synchronization .............................................. 185 SPI Master Mode (CKE = 1, SMP = 1) ..................... 250 SPI Mode (Master Mode).......................................... 184 SPI Mode (Slave Mode with CKE = 0) ...................... 186 SPI Mode (Slave Mode with CKE = 1) ...................... 186 SPI Slave Mode (CKE = 0) ....................................... 251 SPI Slave Mode (CKE = 1) ....................................... 251 Synchronous Reception (Master Mode, SREN) ....... 174 Synchronous Transmission....................................... 172 Synchronous Transmission (Through TXEN) ........... 172 Time-out Sequence Case 1............................................................... 204 Case 2............................................................... 204 Case 3............................................................... 204 Timer0 and Timer1 External Clock ........................... 246 Timer1 Incrementing Edge.......................................... 87 Two Speed Start-up .................................................... 56 Wake-up from Interrupt ............................................. 215 Timing Parameter Symbology........................................... 240 Timing Requirements I2C Bus Data ............................................................. 254 I2C Bus Start/Stop Bits ............................................. 253 SPI Mode .................................................................. 252 TRISA Registers .................................................................... 59 TRISA Register................................................................... 59 TRISB Registers .................................................................... 69 TRISB Register................................................................... 70 TRISC Registers .................................................................... 76 TRISC Register................................................................... 76 Two-Speed Clock Start-up Mode........................................ 55 TXREG ............................................................................. 153 TXSTA Register................................................................ 160 BRGH Bit .................................................................. 163 U UA..................................................................................... 180 Ultra Low-Power Wake-up.............. 14, 16, 18, 20, 22, 60, 63 Update Address bit, UA .................................................... 180 V Voltage Reference (VR) Specifications ........................................................... 248 Voltage Reference. See Comparator Voltage Reference (CVREF) Voltage References Associated registers ................................................. 106 VP6 Stabilization ...................................................... 105 VREF. SEE ADC Reference Voltage W Wake-up on Break ............................................................ 168 Wake-up Using Interrupts ................................................. 214 Watchdog Timer (WDT).................................................... 212 Associated registers ................................................. 213 Clock Source ............................................................ 212 Modes....................................................................... 212 Period ....................................................................... 212 Specifications ........................................................... 245 WCOL bit .......................................................................... 181 WDTCON Register ........................................................... 213 WPUA Register................................................................... 62 WPUB Register................................................................... 70 Write Collision Detect bit (WCOL) .................................... 181 WWW Address ................................................................. 301 WWW, On-Line Support ....................................................... 8 |
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