PIC18F4580-ESLASHML datasheet(476/490 Pages) MICROCHIP

476 / 490 page

PIC18F2480/2580/4480/4580

DS39637D-page 476

BSF .................................................................................. 379

BTFSC ............................................................................. 380

BTFSS .............................................................................. 380

BTG .................................................................................. 381

BZ ..................................................................................... 382

C Compilers

MPLAB C18 ............................................................. 418

CALL ................................................................................ 382

CALLW ............................................................................. 411

CAN Module

External-Internal Clock in HS-PLL

Based Oscillators ............................................. 339

Capture (CCP Module) ..................................................... 169

Associated Registers ............................................... 172

CCP1/ECCP1 Pin Configuration .............................. 169

CCPR1H:CCPR1L Registers ................................... 169

Software Interrupt .................................................... 169

Timer1/Timer3 Mode Selection ................................ 169

Capture (ECCP Module) .................................................. 178

Capture/Compare/PWM (CCP) ........................................ 167

Capture Mode. See Capture.

CCP Mode and Timer Resources ............................ 168

CCPRxH Register .................................................... 168

CCPRxL Register ..................................................... 168

Compare Mode. See Compare.

Interaction Between CCP1 and ECCP1

for Timer Resources ........................................ 168

Module Configuration ............................................... 168

PWM Mode. See PWM.

Clock Sources .................................................................... 34

Selecting the 31 kHz Source ...................................... 35

Selection Using OSCCON Register ........................... 35

Clocking Scheme/Instruction Cycle .................................... 71

CLRF ................................................................................ 383

CLRWDT .......................................................................... 383

Code Examples

16 x 16 Signed Multiply Routine .............................. 118

16 x 16 Unsigned Multiply Routine .......................... 118

8 x 8 Signed Multiply Routine .................................. 117

8 x 8 Unsigned Multiply Routine .............................. 117

Changing Between Capture Prescalers ................... 169

Changing to Configuration Mode ............................. 284

Computed GOTO Using an Offset Value ................... 70

Data EEPROM Read ............................................... 113

Data EEPROM Refresh Routine .............................. 114

Data EEPROM Write ............................................... 113

Erasing a Flash Program Memory Row ................... 106

Fast Register Stack .................................................... 70

How to Clear RAM (Bank 1) Using

Indirect Addressing ............................................ 95

Implementing a Real-Time Clock Using

a Timer1 Interrupt Service ............................... 159

Initializing PORTA .................................................... 135

Initializing PORTB .................................................... 138

Initializing PORTC .................................................... 141

Initializing PORTD .................................................... 143

Initializing PORTE .................................................... 146

Loading the SSPBUF (SSPSR) Register ................. 194

Reading a CAN Message ........................................ 299

Reading a Flash Program Memory Word ................ 105

Saving STATUS, WREG and BSR

Registers in RAM ............................................. 134

Transmitting a CAN Message Using

Banked Method ................................................ 292

Transmitting a CAN Message Using WIN Bits ......... 292

WIN and ICODE Bits Usage in Interrupt Service

Routine to Access TX/RX Buffers .................... 284

Writing to Flash Program Memory ................... 108–109

Code Protection ............................................................... 349

COMF .............................................................................. 384

Comparator ...................................................................... 263

Analog Input Connection Considerations ................ 267

Associated Registers ............................................... 267

Configuration ........................................................... 264

Effects of a Reset .................................................... 266

Interrupts ................................................................. 266

Operation ................................................................. 265

Operation During Sleep ........................................... 266

Outputs .................................................................... 265

Reference ................................................................ 265

External Signal ................................................ 265

Internal Signal .................................................. 265

Response Time ........................................................ 265

Comparator Specifications ............................................... 436

Comparator Voltage Reference ....................................... 269

Accuracy and Error .................................................. 270

Associated Registers ............................................... 271

Configuring .............................................................. 269

Connection Considerations ...................................... 270

Effects of a Reset .................................................... 270

Operation During Sleep ........................................... 270

Compare (CCP Module) .................................................. 171

Associated Registers ............................................... 172

CCP Pin Configuration ............................................. 171

CCPR1 Register ...................................................... 171

Software Interrupt .................................................... 171

Special Event Trigger .............................. 165, 171, 262

Timer1/Timer3 Mode Selection ................................ 171

Compare (ECCP Module) ................................................ 178

Special Event Trigger .............................................. 178

Configuration Bits ............................................................ 349

Configuration Mode ......................................................... 330

Configuration Register Protection .................................... 366

Context Saving During Interrupts ..................................... 134

Conversion Considerations .............................................. 472

CPFSEQ .......................................................................... 384

CPFSGT .......................................................................... 385

CPFSLT ........................................................................... 385

Crystal Oscillator/Ceramic Resonator ................................ 29

Customer Change Notification Service ............................ 486

Customer Notification Service ......................................... 486

Customer Support ............................................................ 486

Data Addressing Modes .................................................... 95

Comparing Addressing Modes with the

Extended Instruction Set Enabled ..................... 99

Direct ......................................................................... 95

Indexed Literal Offset ................................................ 98

Indirect ....................................................................... 95

Inherent and Literal .................................................... 95

Data EEPROM Code Protection ...................................... 366

Data EEPROM Memory ................................................... 111

Associated Registers ............................................... 115

EEADR Register ...................................................... 111

EECON1 and EECON2 Registers ........................... 111

Operation During Code-Protect ............................... 114

Protection Against Spurious Write ........................... 114

Reading ................................................................... 113

Using ....................................................................... 114

PIC18F4580-E/ML Datasheet(PDF) 476 Page - Microchip Technology

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