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PIC18F4580-E/ML Datasheet(PDF) 183 Page - Microchip Technology |
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PIC18F4580-E/ML Datasheet(HTML) 183 Page - Microchip Technology |
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183 / 490 page ![]() © 2009 Microchip Technology Inc. DS39637D-page 183 PIC18F2480/2580/4480/4580 17.4.5 FULL-BRIDGE MODE In Full-Bridge Output mode, four pins are used as outputs; however, only two outputs are active at a time. In the Forward mode, pin P1A is continuously active and pin P1D is modulated. In the Reverse mode, pin P1C is continuously active and pin P1B is modulated. These are illustrated in Figure 17-6. P1A, P1B, P1C and P1D outputs are multiplexed with the PORTD<4>, PORTD<5>, PORTD<6> and PORTD<7> data latches. The TRISD<4>, TRISD<5>, TRISD<6> and TRISD<7> bits must be cleared to make the P1A, P1B, P1C and P1D pins outputs. FIGURE 17-6: FULL-BRIDGE PWM OUTPUT Period Duty Cycle P1A(2) P1B(2) P1C(2) P1D(2) Forward Mode (1) Period Duty Cycle P1A(2) P1C(2) P1D(2) P1B(2) Reverse Mode (1) (1) (1) Note 1: At this time, the TMR2 register is equal to the PR2 register. Note 2: Output signal is shown as active-high. |
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