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PC312XDP512F0CFVR Datasheet(PDF) 250 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR Datasheet(HTML) 250 Page - Freescale Semiconductor, Inc |
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250 / 1348 page  Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 250 Freescale Semiconductor Operation RS.L – IMM8 ⇒ NONE, only condition code flags get updated Subtracts the 8 bit constant IMM8 contained in the instruction code from the low byte of the source register RS.L using binary subtraction and updates the condition code register accordingly. Remark: There is no equivalent operation using triadic addressing. Comparing the values of two registers can be performed by using the subtract instruction with R0 as destination register. CCR Effects Code and CPU Cycles CMPL Compare Immediate 8 bit Constant (Low Byte) CMPL NZ V C ∆∆∆∆ N: Set if bit 7 of the result is set; cleared otherwise. Z: Set if the 8 bit result is $00; cleared otherwise. V: Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise. RS[7] & IMM8[7] & result[7] | RS[7] & IMM8[7] & result[7] C: Set if there is a carry from the Bit 7 to Bit 8 of the result; cleared otherwise. RS[7] & IMM8[7] | RS[7] & result[7] | IMM8[7] & result[7] Source Form Address Mode Machine Code Cycles CMPL RS, #IMM8 IMM8 1 1 0 1 0 RS IMM8 P |
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