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PC312XDP512F0CFVR Datasheet(PDF) 506 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR Datasheet(HTML) 506 Page - Freescale Semiconductor, Inc |
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506 / 1348 page ![]() Chapter 11 Serial Communication Interface (S12SCIV5) MC9S12XDP512 Data Sheet, Rev. 2.21 506 Freescale Semiconductor In Figure 11-24, a large burst of noise is perceived as the beginning of a start bit, although the test sample at RT5 is high. The RT5 sample sets the noise flag. Although this is a worst-case misalignment of perceived bit time, the data samples RT8, RT9, and RT10 are within the bit time and data recovery is successful. Figure 11-24. Start Bit Search Example 3 Figure 11-25 shows the effect of noise early in the start bit time. Although this noise does not affect proper synchronization with the start bit time, it does set the noise flag. Figure 11-25. Start Bit Search Example 4 Reset RT Clock Samples RT Clock RT Clock Count Actual Start Bit RXD 10 1 11 0 0 0 0 LSB 0 Perceived Start Bit Reset RT Clock Samples RT Clock RT Clock Count Perceived and Actual Start Bit RXD 11 1 11 0 0 1 LSB 1 1 1 1 |
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