PC312XDP512F0CFVR datasheet(1066/1348 Pages) FREESCALE

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Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

1068

Freescale Semiconductor

25.4.3

Illegal EEPROM Operations

The ACCERR ﬂag will be set during the command write sequence if any of the following illegal steps are

performed, causing the command write sequence to immediately abort:

1. Writing to an EEPROM address before initializing the ECLKDIV register.

2. Writing a byte or misaligned word to a valid EEPROM address.

3. Starting a command write sequence while a sector erase abort operation is active.

4. Writing to any EEPROM register other than ECMD after writing to an EEPROM address.

5. Writing a second command to the ECMD register in the same command write sequence.

6. Writing an invalid command to the ECMD register.

7. Writing to an EEPROM address after writing to the ECMD register.

8. Writing to any EEPROM register other than ESTAT (to clear CBEIF) after writing to the ECMD

9. Writing a 0 to the CBEIF ﬂag in the ESTAT register to abort a command write sequence.

The ACCERR ﬂag will not be set if any EEPROM register is read during a valid command write sequence.

The ACCERR ﬂag will also be set if any of the following events occur:

1. Launching the sector erase abort command while a sector erase or sector modify operation is active

which results in the early termination of the sector erase or sector modify operation (see

Section 25.4.2.5, “Sector Erase Abort Command”).

2. The MCU enters stop mode and a command operation is in progress. The operation is aborted

immediately and any pending command is purged (see Section 25.5.2, “Stop Mode”).

If the EEPROM memory is read during execution of an algorithm (CCIF = 0), the read operation will

return invalid data and the ACCERR ﬂag will not be set.

If the ACCERR ﬂag is set in the ESTAT register, the user must clear the ACCERR ﬂag before starting

another command write sequence (see Section 25.3.2.6, “EEPROM Status Register (ESTAT)”).

The PVIOL ﬂag will be set after the command is written to the ECMD register during a command write

sequence if any of the following illegal operations are attempted, causing the command write sequence to

immediately abort:

1. Writing the program command if the address written in the command write sequence was in a

protected area of the EEPROM memory.

2. Writing the sector erase command if the address written in the command write sequence was in a

protected area of the EEPROM memory.

3. Writing the mass erase command to the EEPROM memory while any EEPROM protection is

enabled.

4. Writing the sector modify command if the address written in the command write sequence was in

a protected area of the EEPROM memory.

If the PVIOL ﬂag is set in the ESTAT register, the user must clear the PVIOL ﬂag before starting another

command write sequence (see Section 25.3.2.6, “EEPROM Status Register (ESTAT)”).

PC312XDP512F0CFVR Datasheet(PDF) 1066 Page - Freescale Semiconductor, Inc