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PC312XDP512F0CFVR Datasheet(PDF) 1170 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR Datasheet(HTML) 1170 Page - Freescale Semiconductor, Inc |
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1170 / 1348 page ![]() Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1) MC9S12XDP512 Data Sheet, Rev. 2.21 1172 Freescale Semiconductor Figure 28-25. Example Erase Verify Command Flow Write: Flash Block Address Write: FCMD register Erase Verify Command 0x05 Write: FSTAT register Clear CBEIF 0x80 1. 2. 3. Clear ACCERR/PVIOL 0x30 Write: FSTAT register yes no Access Error and Protection Violation no and Dummy Data Bit Polling for Command Completion Check Read: FSTAT register yes Read: FSTAT register no START yes Check CBEIF Set? Next no yes Address, Data, Command Buffer Empty Check Flash Block? CCIF Set? ACCERR/ PVIOL Set? no Erase Verify Status yes EXIT Flash Block Not Erased EXIT Flash Block Erased BLANK Set? Decrement Global Address Write: FCLKDIV register Read: FCLKDIV register yes no Clock Register Written Check FDIVLD Set? NOTE: FCLKDIV needs to be set once after each reset. Simultaneous Multiple Flash Block Decision by 128K (skip unimplemented Flash) |
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