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PC912XDP512F0CALR Datasheet(PDF) 252 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0CALR Datasheet(HTML) 252 Page - Freescale Semiconductor, Inc |
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252 / 1348 page  Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 252 Freescale Semiconductor Operation RS2 – RS1 - C ⇒ NONE (translates to SBC R0, RS1, RS2) Subtracts the carry bit and the content of register RS2 from the content of register RS1 using binary subtraction and discards the result. CCR Effects Code and CPU Cycles CPC Compare with Carry CPC NZ V C ∆∆∆∆ N: Set if bit 15 of the result is set; cleared otherwise. Z: Set if the result is $0000; cleared otherwise. V: Set if a two´s complement overflow resulted from the operation; cleared otherwise. RS1[15] & RS2[15] & result[15] | RS1[15] & RS2[15] & result[15] C: Set if there is a carry from the bit 15 of the result; cleared otherwise. RS1[15] & RS2[15] | RS1[15] & result[15] | RS2[15] & result[15] Source Form Address Mode Machine Code Cycles CPC RS1, RS2 TRI 0 0 0 1 1 0 0 0 RS1 RS2 0 1 P |
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