PC912XDP512F0CALR datasheet(454/1348 Pages) FREESCALE

454 / 1348 page

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

454

Freescale Semiconductor

10.3.3.3

Data Length Register (DLR)

This register keeps the data length ﬁeld of the CAN frame.

Module Base + 0x0004 (DSR0)

0x0005 (DSR1)

0x0006 (DSR2)

0x0007 (DSR3)

0x0008 (DSR4)

0x0009 (DSR5)

0x000A (DSR6)

0x000B (DSR7)

76543210

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Reset:

xxxxxxxx

Figure 10-34. Data Segment Registers (DSR0–DSR7) — Extended Identiﬁer Mapping

Table 10-31. DSR0–DSR7 Register Field Descriptions

Field

Description

7:0

DB[7:0]

Data bits 7:0

76543210

DLC3

DLC2

DLC1

DLC0

Reset:

xxxxxxxx

= Unused; always read “x”

Figure 10-35. Data Length Register (DLR) — Extended Identiﬁer Mapping

Table 10-32. DLR Register Field Descriptions

Field

Description

3:0

DLC[3:0]

Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective

message. During the transmission of a remote frame, the data length code is transmitted as programmed while

the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.

Table 10-33 shows the effect of setting the DLC bits.

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