XIO2001IPNP datasheet(111/131 Pages) TI

111 / 131 page

XIO2001

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SCPS212D – MAY 2009 – REVISED JANUARY 2010

Table 6-8. Serial IRQ Status Register Description (continued)

BIT

FIELD NAME

ACCESS

DESCRIPTION

IRQ 12 asserted. This bit indicates that the IRQ12 has been asserted.

12(1)

IRQ12

RCU

0 = Deasserted

1 = Asserted

IRQ 11 asserted. This bit indicates that the IRQ11 has been asserted.

11(1)

IRQ11

RCU

0 = Deasserted

1 = Asserted

IRQ 10 asserted. This bit indicates that the IRQ10 has been asserted.

10(1)

IRQ10

RCU

0 = Deasserted

1 = Asserted

IRQ 9 asserted. This bit indicates that the IRQ9 has been asserted.

9(1)

IRQ9

RCU

0 = Deasserted

1 = Asserted

IRQ 8 asserted. This bit indicates that the IRQ8 has been asserted.

8(1)

IRQ8

RCU

0 = Deasserted

1 = Asserted

IRQ 7 asserted. This bit indicates that the IRQ7 has been asserted.

7(1)

IRQ7

RCU

0 = Deasserted

1 = Asserted

IRQ 6 asserted. This bit indicates that the IRQ6 has been asserted.

6(1)

IRQ6

RCU

0 = Deasserted

1 = Asserted

IRQ 5 asserted. This bit indicates that the IRQ5 has been asserted.

5(1)

IRQ5

RCU

0 = Deasserted

1 = Asserted

IRQ 4 asserted. This bit indicates that the IRQ4 has been asserted.

4(1)

IRQ4

RCU

0 = Deasserted

1 = Asserted

IRQ 3 asserted. This bit indicates that the IRQ3 has been asserted.

3(1)

IRQ3

RCU

0 = Deasserted

1 = Asserted

IRQ 2 asserted. This bit indicates that the IRQ2 has been asserted.

2(1)

IRQ2

RCU

0 = Deasserted

1 = Asserted

IRQ 1 asserted. This bit indicates that the IRQ1 has been asserted.

1(1)

IRQ1

RCU

0 = Deasserted

1 = Asserted

Memory-Mapped TI Proprietary Register Space

111

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