910GL datasheet(192/426 Pages) INTEL

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910GL Datasheet(PDF) 192 Page - Intel Corporation

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Integrated Graphics Device Registers (D2:F0)

(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)

192

Datasheet

9.1.33

ASLS—ASL Storage (D2:F0)

PCI Device:

Address Offset:

FCh

Default Value:

00000000h

Access:

R/W

Size:

32 bits

This SW scratch register only needs to be read/write accessible. The exact bit register usage must

be worked out in common between System BIOS and driver software, but storage for

switching/indicating up to 6 devices is possible with this amount. For each device, the ASL

control method requires two bits for _DOD (BIOS detectable yes or no, VGA/Non VGA); one bit

for _DGS (enable/disable requested) and two bits for _DCS (enabled now/disabled now,

connected or not).

Bit

Access &

Default

Description

31:0

R/W

00000000 h

RW according to a software controlled usage to support device switching

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