PIC24FV32KA302-ISLASHML datasheet(199/364 Pages) MICROCHIP

199 / 364 page

 2011-2013 Microchip Technology Inc.

DS39995D-page 199

PIC24FV32KA304 FAMILY

20.0 32-BIT PROGRAMMABLE

CYCLIC REDUNDANCY CHECK

(CRC) GENERATOR

The programmable CRC generator provides a

hardware implemented method of quickly generating

checksums for various networking and security

applications. It offers the following features:

• User-programmable CRC polynomial equation,

up to 32 bits

• Programmable shift direction (little or big-endian)

• Independent data and polynomial lengths

• Configurable interrupt output

• Data FIFO

A simplified block diagram of the CRC generator is

shown in Figure 20-1. A simple version of the CRC shift

engine is shown in Figure 20-2.

FIGURE 20-1:

CRC BLOCK DIAGRAM

FIGURE 20-2:

CRC SHIFT ENGINE DETAIL

Note:

This data sheet summarizes the features of

this group of PIC24F devices. It is not

intended to be a comprehensive reference

source. For more information, refer to the

“PIC24F

Family

Reference

Manual”,

Section 41. “32-Bit Programmable Cyclic

Redundancy Check (CRC)” (DS39729).

Variable FIFO

(4x32, 8x16 or 16x8)

CRCDATH

CRCDATL

Shift Buffer

CRC Shift Engine

CRCWDATH

CRCWDATL

LENDIAN

CRCISEL

FIFO Empty Event

Shift Complete Event

Set CRCIF

2 * FCY Shift Clock

CRCWDATH

CRCWDATL

Bit 0

Bit 1

Bit n(2)

X(1)(1)

Read/Write Bus

Shift Buffer

Data

Bit 2

X(2)(1)

X(n)(1)

Note 1:

Each XOR stage of the shift engine is programmable; see text for details.

Polynomial Length n is determined by ([PLEN<4:0>] + 1).

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