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ST7FLITE25F1B6 Datasheet(PDF) 113 Page - STMicroelectronics |
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ST7FLITE25F1B6 Datasheet(HTML) 113 Page - STMicroelectronics |
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113 / 166 page ![]() ST7LITE20F2 ST7LITE25F2 ST7LITE29F2 Instruction set Doc ID 8349 Rev 5 113/166 12.1.5 Indirect (short, long) The required data byte to do the operation is found by its memory address, located in memory (pointer). The pointer address follows the opcode. The indirect addressing mode consists of two submodes: ● Indirect (short) The pointer address is a byte, the pointer size is a byte, thus allowing 00 - FF addressing space, and requires 1 byte after the opcode. ● Indirect (long) The pointer address is a byte, the pointer size is a word, thus allowing 64 Kbyte addressing space, and requires 1 byte after the opcode. 12.1.6 Indirect indexed (short, long) This is a combination of indirect and short indexed addressing modes. The operand is referenced by its memory address, which is defined by the unsigned addition of an index register value (X or Y) with a pointer value located in memory. The pointer address follows the opcode. The indirect indexed addressing mode consists of two submodes: ● Indirect indexed (short) The pointer address is a byte, the pointer size is a byte, thus allowing 00 - 1FE addressing space, and requires 1 byte after the opcode. ● Indirect indexed (long) The pointer address is a byte, the pointer size is a word, thus allowing 64 Kbyte addressing space, and requires 1 byte after the opcode. I I Table 52. Long and short instructions supporting direct, indexed, indirect and indirect indexed addressing modes Long and short instructions Function LD Load CP Compare AND, OR, XOR Logical operations ADC, ADD, SUB, SBC Arithmetic Additions/Subtractions operations BCP Bit Compare Table 53. Short instructions supporting direct, indexed, indirect and indirect indexed addressing modes Short instructions only Function CLR Clear INC, DEC Increment/Decrement TNZ Test Negative or Zero CPL, NEG 1 or 2 Complement BSET, BRES Bit operations |
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