DSPIC33FJMC202ESS datasheet(220/330 Pages) MICROCHIP

220 / 330 page

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

DS70283K-page 220

Most instructions are a single word. Certain

double-word instructions are designed to provide all the

required information in these 48 bits. In the second

word, the 8 MSbs are ‘0’s. If this second word is exe-

cuted as an instruction (by itself), it will execute as a

NOP.

The double-word instructions execute in two instruction

cycles.

Most single-word instructions are executed in a single

instruction cycle, unless a conditional test is true, or the

program counter is changed as a result of the

instruction. In these cases, the execution takes two

instruction cycles with the additional instruction cycle(s)

executed as a NOP. Notable exceptions are the BRA

(unconditional/computed branch), indirect CALL/GOTO,

all table reads and writes and RETURN/RETFIE

instructions, which are single-word instructions but take

two or three cycles. Certain instructions that involve skip-

ping over the subsequent instruction require either two

or three cycles if the skip is performed, depending on

whether the instruction being skipped is a single-word or

two-word instruction. Moreover, double-word moves

require two cycles.

Note:

For more details on the instruction set,

refer to the “16-bit MCU and DSC

Programmer’s

Reference

Manual”

(DS70157).

TABLE 22-1:

SYMBOLS USED IN OPCODE DESCRIPTIONS

Field

Description

#text

Means literal defined by “text”

(text)

Means “content of text”

[text]

Means “the location addressed by text”

{ }

Optional field or operation

<n:m>

Byte mode selection

Double-Word mode selection

Shadow register select

Word mode selection (default)

Acc

One of two accumulators {A, B}

AWB

Accumulator write back destination address register

∈ {W13, [W13]+ = 2}

bit4

4-bit bit selection field (used in word addressed instructions)

∈ {0...15}

C, DC, N, OV, Z

MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero

Expr

Absolute address, label or expression (resolved by the linker)

File register address

∈ {0x0000...0x1FFF}

lit1

1-bit unsigned literal

∈ {0,1}

lit4

4-bit unsigned literal

∈ {0...15}

lit5

5-bit unsigned literal

∈ {0...31}

lit8

8-bit unsigned literal

∈ {0...255}

lit10

10-bit unsigned literal

∈ {0...255} for Byte mode, {0:1023} for Word mode

lit14

14-bit unsigned literal

∈ {0...16384}

lit16

16-bit unsigned literal

∈ {0...65535}

lit23

23-bit unsigned literal

∈ {0...8388608}; LSb must be ‘0’

None

Field does not require an entry, can be blank

OA, OB, SA, SB

DSP Status bits: ACCA Overflow, ACCB Overflow, ACCA Saturate, ACCB Saturate

Program Counter

Slit10

10-bit signed literal

∈ {-512...511}

Slit16

16-bit signed literal

∈ {-32768...32767}

Slit6

6-bit signed literal

∈ {-16...16}

Base W register

∈ {W0..W15}

Destination W register

∈ { Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }

Wdo

Destination W register

∈

{ Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }

Wm,Wn

Dividend, Divisor working register pair (direct addressing)

DSPIC33FJMC202ESS Datasheet(PDF) 220 Page - Microchip Technology

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