DSPIC33FJMC202ESS datasheet(312/330 Pages) MICROCHIP

312 / 330 page

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

DS70283K-page 312

Section 18.0 “Inter-Integrated

Circuit™ (I2C™)”

Removed the following sections, which are now available in the related

section of the dsPIC33F/PIC24H Family Reference Manual:

• 17.3 “I2C Interrupts”

• 17.4 “Baud Rate Generator” (retained Figure 15-1: I2C Block Diagram)

• 17.5 “I2C Module Addresses”

• 17.6 “Slave Address Masking”

• 17.7 “IPMI Support”

• 17.8 “General Call Address Support”

• 17.9 “Automatic Clock Stretch”

• 17.10 “Software Controlled Clock Stretching (STREN = 1)”

• 17.11 “Slope Control”

• 17.12 “Clock Arbitration”

• 17.13 “Multi-Master Communication, Bus Collision, and Bus Arbitration”

• 17.14 “Peripheral Pin Select Limitations”

Section 19.0 “Universal

Asynchronous Receiver Transmitter

(UART)”

Removed the following sections, which are now available in the related

section of the dsPIC33F/PIC24H Family Reference Manual:

• 18.1 “UART Baud Rate Generator”

• 18.2 “Transmitting in 8-bit Data Mode”

• 18.3 “Transmitting in 9-bit Data Mode”

• 18.4 “Break and Sync Transmit Sequence”

• 18.5 “Receiving in 8-bit or 9-bit Data Mode”

• 18.6 “Flow Control Using UxCTS and UxRTS Pins”

• 18.7 “Infrared Support”

Removed IrDA references and Note 1, and updated the bit and bit value

descriptions for UTXINV (UxSTA<14>) in the UARTx Status and Control

Section 20.0 “10-bit/12-bit

Analog-to-Digital Converter (ADC)”

Removed Equation 19-1: ADC Conversion Clock Period and Figure 19-2:

ADC Transfer Function (10-Bit Example).

Added ADC1 Module Block Diagram for dsPIC33FJ16MC304 and

dsPIC33FJ32MC204 Devices (Figure 20-1) and ADC1 Module Block

Diagram FOR dsPIC33FJ32MC202 Devices (Figure 20-2).

Added Note 2 to Figure 20-3: ADC Conversion Clock Period Block Diagram.

Updated ADC Conversion Clock Select bits in the AD1CON3 register from

ADCS<5:0> to ADCS<7:0>. Any references to these bits have also been

updated throughout this data sheet (Register 20-3).

Added device-specific information to Note 1 in the ADC1 Input Scan Select

12-10 (CSS12-CSS10) from U-0 to R/W-0.

Added device-specific information to Note 1 in the ADC1 Port Configuration

12-10 (PCFG12-PCFG10) from U-0 to R/W-0.

TABLE A-1:

MAJOR SECTION UPDATES (CONTINUED)

Section Name

Update Description

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