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DSPIC33FJMC202ESS Datasheet(PDF) 165 Page - Microchip Technology |
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DSPIC33FJMC202ESS Datasheet(HTML) 165 Page - Microchip Technology |
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165 / 330 page  © 2007-2012 Microchip Technology Inc. DS70283K-page 165 dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 REGISTER 15-4: PxSECMP: SPECIAL EVENT COMPARE REGISTER R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 SEVTDIR(1) SEVTCMP<14:8>(2) bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 SEVTCMP<7:0>(2) bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 SEVTDIR: Special Event Trigger Time Base Direction bit(1) 1 = A Special Event Trigger will occur when the PWM time base is counting downward 0 = A Special Event Trigger will occur when the PWM time base is counting upward bit 14-0 SEVTCMP<14:0>: Special Event Compare Value bits(2) Note 1: SEVTDIR is compared with PTDIR (PXTMR<15>) to generate the Special Event Trigger. 2: PxSECMP<14:0> is compared with PXTMR<14:0> to generate the Special Event Trigger. |
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