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DSPIC33FJMC202ESS Datasheet(PDF) 191 Page - Microchip Technology |
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DSPIC33FJMC202ESS Datasheet(HTML) 191 Page - Microchip Technology |
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191 / 330 page ![]() © 2007-2012 Microchip Technology Inc. DS70283K-page 191 dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 bit 3 S: Start bit 1 = Indicates that a Start (or Repeated Start) bit has been detected last 0 = Start bit was not detected last Hardware set or clear when Start, Repeated Start or Stop detected. bit 2 R_W: Read/Write Information bit (when operating as I2C slave) 1 = Read – indicates data transfer is output from slave 0 = Write – indicates data transfer is input to slave Hardware set or clear after reception of I2C device address byte. bit 1 RBF: Receive Buffer Full Status bit 1 = Receive complete, I2CxRCV is full 0 = Receive not complete, I2CxRCV is empty Hardware set when I2CxRCV is written with received byte. Hardware clear when software reads I2CxRCV. bit 0 TBF: Transmit Buffer Full Status bit 1 = Transmit in progress, I2CxTRN is full 0 = Transmit complete, I2CxTRN is empty Hardware set when software writes I2CxTRN. Hardware clear at completion of data transmission. REGISTER 18-2: I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED) |
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