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DSPIC33FJ12GP201TE/ML Datasheet(PDF) 138 Page - Microchip Technology |
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DSPIC33FJ12GP201TE/ML Datasheet(HTML) 138 Page - Microchip Technology |
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138 / 242 page ![]() dsPIC33FJ12GP201/202 DS70264B-page 136 Preliminary © 2007 Microchip Technology Inc. The SPI module generates an interrupt indicating com- pletion of a byte or word transfer, as well as a separate interrupt for all SPI error conditions. FIGURE 14-1: SPI MODULE BLOCK DIAGRAM Internal Data Bus SDIx SDOx SSx SCKx SPIxSR bit 0 Shift Control Edge Select FCY Primary 1:1/4/16/64 Enable Prescaler Sync SPIxBUF Control Transfer Transfer Write SPIxBUF Read SPIxBUF 16 SPIxCON1<1:0> SPIxCON1<4:2> Master Clock Clock Control Secondary Prescaler 1:1 to 1:8 SPIxRXB SPIxTXB |
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