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DSPIC30F0010AT-20E/S Datasheet(PDF) 205 Page - Microchip Technology |
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DSPIC30F0010AT-20E/S Datasheet(HTML) 205 Page - Microchip Technology |
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205 / 236 page ![]() © 2007 Microchip Technology Inc. DS70150C-page 203 dsPIC30F6010A/6015 FIGURE 24-19: SPI MODULE SLAVE MODE (CKE = 1) TIMING CHARACTERISTICS SSX SCKX (CKP = 0) SCKX (CKP = 1) SDOX SDI SP50 SP60 SDIX SP30,SP31 MSb BIT14 - - - - - -1 LSb SP51 MSb IN BIT14 - - - -1 LSb IN SP35 SP52 SP52 SP73 SP72 SP72 SP73 SP71 SP70 SP40 SP41 Note: Refer to Figure 24-2 for load conditions. TABLE 24-36: SPI MODULE SLAVE MODE (CKE = 1) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions SP70 TscL SCKX Input Low Time 30 — — ns — SP71 TscH SCKX Input High Time 30 — — ns — SP72 TscF SCKX Input Fall Time(3) —10 25 ns — SP73 TscR SCKX Input Rise Time(3) —10 25 ns — SP30 TdoF SDOX Data Output Fall Time(3) — — — ns See parameter DO32 SP31 TdoR SDOX Data Output Rise Time(3) — — — ns See parameter DO31 SP35 TscH2doV, TscL2doV SDOX Data Output Valid after SCKX Edge —— 30 ns — SP40 TdiV2scH, TdiV2scL Setup Time of SDIX Data Input to SCKX Edge 20 — — ns — SP41 TscH2diL, TscL2diL Hold Time of SDIX Data Input to SCKX Edge 20 — — ns — SP50 TssL2scH, TssL2scL SSX ↓ to SCKX↓ or SCKX↑ input 120 — — ns — Note 1: These parameters are characterized but not tested in manufacturing. 2: Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 3: The minimum clock period for SCK is 100 ns. Therefore, the clock generated in Master mode must not violate this specification. 4: Assumes 50 pF load on all SPI pins. |
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