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DSPIC30F0010AT-20E/S Datasheet(PDF) 142 Page - Microchip Technology |
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DSPIC30F0010AT-20E/S Datasheet(HTML) 142 Page - Microchip Technology |
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142 / 236 page ![]() dsPIC30F6010A/6015 DS70150C-page 140 © 2007 Microchip Technology Inc. The configuration guidelines give the required setup values for the conversion speeds above 500 ksps, since they require external VREF pins usage and there are some differences in the configuration procedure. Configuration details that are not critical to the conversion speed have been omitted. The following figure depicts the recommended circuit for the conversion rates above 500 ksps. FIGURE 20-2: A/D CONVERTER VOLTAGE REFERENCE SCHEMATIC 20.7.1 1 Msps CONFIGURATION GUIDELINE The configuration for 1 Msps operation is dependent on whether a single input pin is to be sampled or whether multiple pins will be sampled. 20.7.1.1 Single Analog Input For conversions at 1 Msps for a single analog input, at least two sample and hold channels must be enabled. The analog input multiplexer must be configured so that the same input pin is connected to both sample and hold channels. The A/D converts the value held on one S/H channel, while the second S/H channel acquires a new input sample. 20.7.1.2 Multiple Analog Inputs The A/D converter can also be used to sample multiple analog inputs using multiple sample and hold channels. In this case, the total 1 Msps conversion rate is divided among the different input signals. For example, four inputs can be sampled at a rate of 250 ksps for each signal or two inputs could be sampled at a rate of 500 ksps for each signal. Sequential sampling must be used in this configuration to allow adequate sampling time on each input. VSS VDD VDD VSS dsPIC30F6010A VDD VDD VDD VDD VDD VDD VDD R2 10 C2 0.1 μF C1 0.01 μF R1 10 C8 1 μF VDD C7 0.1 μF VDD C6 0.01 μF VDD C5 1 μF VDD C4 0.1 μF VDD C3 0.01 μF |
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