DSPIC30F0010AT-20ESLASHS datasheet(187/236 Pages) MICROCHIP

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DS70150C-page 185

dsPIC30F6010A/6015

TABLE 24-14: EXTERNAL CLOCK TIMING REQUIREMENTS

AC CHARACTERISTICS

Standard Operating Conditions: 2.5V to 5.5V

(unless otherwise stated)

Operating temperature

-40°C

≤ TA ≤ +85°C for Industrial

-40°C

≤ TA ≤ +125°C for Extended

Param

No.

Symb

Characteristic

Min

Typ(1)

Max

Units

Conditions

OS10

FOSC

External CLKN Frequency(2)

(External clocks allowed only

in EC mode)

—

7.5(3)

MHz

EC with 4x PLL

EC with 8x PLL

EC with 16x PLL

Oscillator Frequency(2)

0.4

12(4)

—

32.768

7.5(3)

20(4)

15(3)

22.5(3)

—

MHz

kHz

XTL

XT with 4x PLL

XT with 8x PLL

XT with 16x PLL

HS/2 with 4x PLL

HS/2 with 8x PLL

HS/2 with 16x PLL

HS/3 with 4x PLL

HS/3 with 8x PLL

HS/3 with 16x PLL

OS20

TOSC

TOSC = 1/FOSC

—

See parameter OS10

for FOSC value

OS25

TCY

Instruction Cycle Time(2)(5)

—

See Table 24-16

OS30

TosL,

TosH

External Clock(2) in (OSC1)

High or Low Time

.45 x TOSC

——

OS31

TosR,

TosF

External Clock(2) in (OSC1)

Rise or Fall Time

——

OS40

TckR

CLKO Rise Time(2)(6)

—

See parameter DO31

OS41

TckF

CLKO Fall Time(2)(6)

—

See parameter DO32

Note 1:

Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and

are not tested.

These parameters are characterized but not tested in manufacturing.

Limited by the PLL output frequency range.

Limited by the PLL input frequency range.

Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values

are based on characterization data for that particular oscillator type under standard operating conditions

with the device executing code. Exceeding these specified limits may result in an unstable oscillator

operation and/or higher than expected current consumption. All devices are tested to operate at “min.”

values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the

“Max.” cycle time limit is “DC” (no clock) for all devices.

Measurements are taken in EC or ERC modes. The CLKO signal is measured on the OSC2 pin. CLKO is

low for the Q1-Q2 period (1/2 TCY) and high for the Q3-Q4 period (1/2 TCY).

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