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PIC16F1508TESSQTO Datasheet(PDF) 380 Page - Microchip Technology |
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PIC16F1508TESSQTO Datasheet(HTML) 380 Page - Microchip Technology |
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380 / 384 page  PIC16(L)F1508/9 DS41609A-page 380 Preliminary 2011 Microchip Technology Inc. Timer2 T2CON.............................................................. 181 Timing Diagrams A/D Conversion......................................................... 347 A/D Conversion (Sleep Mode) .................................. 348 Acknowledge Sequence ........................................... 222 Asynchronous Reception .......................................... 244 Asynchronous Transmission..................................... 240 Asynchronous Transmission (Back to Back) ............ 240 Auto Wake-up Bit (WUE) During Normal Operation . 256 Auto Wake-up Bit (WUE) During Sleep .................... 256 Automatic Baud Rate Calibration .............................. 254 Baud Rate Generator with Clock Arbitration ............. 215 BRG Reset Due to SDA Arbitration During Start Condition........................................................... 226 Brown-out Reset (BOR) ............................................ 344 Brown-out Reset Situations ........................................ 67 Bus Collision During a Repeated Start Condition (Case 1) ............................................................ 227 Bus Collision During a Repeated Start Condition (Case 2) ............................................................ 227 Bus Collision During a Start Condition (SCL = 0) ..... 226 Bus Collision During a Stop Condition (Case 1) ....... 228 Bus Collision During a Stop Condition (Case 2) ....... 228 Bus Collision During Start Condition (SDA only) ...... 225 Bus Collision for Transmit and Acknowledge............ 224 CLKOUT and I/O....................................................... 343 Clock Synchronization .............................................. 212 Clock Timing ............................................................. 342 Comparator Output ................................................... 153 Fail-Safe Clock Monitor (FSCM) ................................. 61 First Start Bit Timing ................................................. 216 I2C Bus Data ............................................................. 354 I2C Bus Start/Stop Bits.............................................. 354 I2C Master Mode (7 or 10-Bit Transmission) ............ 219 I2C Master Mode (7-Bit Reception)........................... 221 I2C Stop Condition Receive or Transmit Mode ......... 223 INT Pin Interrupt.......................................................... 76 Internal Oscillator Switch Timing................................. 56 Repeat Start Condition.............................................. 217 Reset Start-up Sequence............................................ 69 Reset, WDT, OST and Power-up Timer ................... 344 Send Break Character Sequence ............................. 257 SPI Master Mode (CKE = 1, SMP = 1) ..................... 351 SPI Mode (Master Mode).......................................... 189 SPI Slave Mode (CKE = 0) ....................................... 352 SPI Slave Mode (CKE = 1) ....................................... 352 Synchronous Reception (Master Mode, SREN) ....... 261 Synchronous Transmission....................................... 259 Synchronous Transmission (Through TXEN) ........... 259 Timer0 and Timer1 External Clock ........................... 345 Timer1 Incrementing Edge........................................ 171 Two Speed Start-up .................................................... 59 USART Synchronous Receive (Master/Slave) ......... 350 USART Synchronous Transmission (Master/Slave)................................................... 350 Wake-up from Interrupt ............................................... 88 Timing Parameter Symbology........................................... 341 Timing Requirements I2C Bus Data ............................................................. 355 I2C Bus Start/Stop Bits ............................................. 354 SPI Mode .................................................................. 353 TMR0 Register .................................................................... 29 TMR1H Register ................................................................. 29 TMR1L Register .................................................................. 29 TMR2 Register.................................................................... 29 TRIS.................................................................................. 328 TRISA Register........................................................... 29, 114 TRISB Register........................................................... 29, 118 TRISC ............................................................................... 121 TRISC Register........................................................... 29, 122 Two-Speed Clock Start-up Mode........................................ 58 TXREG ............................................................................. 239 TXREG Register ................................................................. 30 TXSTA Register.......................................................... 30, 246 BRGH Bit .................................................................. 249 U USART Synchronous Master Mode Requirements, Synchronous Receive .............. 350 Requirements, Synchronous Transmission...... 350 Timing Diagram, Synchronous Receive ........... 350 Timing Diagram, Synchronous Transmission... 350 V VREF. SEE ADC Reference Voltage VREGCON Register ........................................................... 90 W Wake-up on Break ............................................................ 255 Wake-up Using Interrupts ................................................... 87 Watchdog Timer (WDT)...................................................... 68 Associated Registers .................................................. 94 Modes......................................................................... 92 Specifications ........................................................... 345 WCOL ....................................................... 215, 218, 220, 222 WCOL Status Flag.................................... 215, 218, 220, 222 WDTCON Register ............................................................. 93 WPUA Register................................................................. 116 WPUB Register................................................................. 120 Write Protection .................................................................. 46 WWW Address ................................................................. 381 WWW, On-Line Support ....................................................... 8 |
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