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PIC16F1508TESSQTO Datasheet(PDF) 110 Page - Microchip Technology |
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PIC16F1508TESSQTO Datasheet(HTML) 110 Page - Microchip Technology |
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110 / 384 page  PIC16(L)F1508/9 DS41609A-page 110 Preliminary 2011 Microchip Technology Inc. TABLE 10-3: SUMMARY OF REGISTERS ASSOCIATED WITH FLASH PROGRAM MEMORY TABLE 10-4: SUMMARY OF CONFIGURATION WORD WITH FLASH PROGRAM MEMORY REGISTER 10-6: PMCON2: PROGRAM MEMORY CONTROL 2 REGISTER W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 Program Memory Control Register 2 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ S = Bit can only be set x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-0 Flash Memory Unlock Pattern bits To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the PMCON1 register. The value written to this register is used to unlock the writes. There are specific timing requirements on these writes. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 78 PMCON1 — CFGS LWLO FREE WRERR WREN WR RD 109 PMCON2 Program Memory Control Register 2 110 PMADRL PMADRL<7:0> 108 PMADRH — PMADRH<6:0> 108 PMDATL PMDATL<7:0> 108 PMDATH — — PMDATH<5:0> 108 Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory module. Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0 Register on Page CONFIG1 13:8 — — FCMEN IESO CLKOUTEN BOREN<1:0> — 44 7:0 CP MCLRE PWRTE WDTE<1:0> FOSC<2:0> CONFIG2 13:8 — — LVP DEBUG LPBOR BORV STVREN — 45 7:0 — — — — — —WRT<1:0> Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory. |
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