PIC24FJ128GA310 datasheet(268/406 Pages) MICROCHIP

268 / 406 page

PIC24FJ128GA310 FAMILY

DS39996F-page 268

 2010-2011 Microchip Technology Inc.

LCDREG: LCD CHARGE PUMP CONTROL REGISTER

RW-0

U-0

CPEN(1)

—

bit 15

bit 8

U-0

RW-1

RW-0

—

BIAS2

BIAS1

BIAS0

MODE13

CKSEL1

CKSEL0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

CPEN:

3.6V Charge Pump Enable bit(1)

= The regulator generates the highest (3.6V) voltage

= Highest voltage in the system is supplied externally (AVDD)

bit 14-6

Unimplemented:

Read as ‘0’

bit 5-3

BIAS<2:0>:

Regulator Voltage Output Control bits

111

= 3.60V peak (offset on LCDBIAS0 of 0V)

110

= 3.47V peak (offset on LCDBIAS0 of 0.13V)

101

= 3.34V peak (offset on LCDBIAS0 of 0.26V)

100

= 3.21V peak (offset on LCDBIAS0 of 0.39V)

011

= 3.08V peak (offset on LCDBIAS0 of 0.52V)

010

= 2.95V peak (offset on LCDBIAS0 of 0.65V)

001

= 2.82V peak (offset on LCDBIAS0 of 0.78V)

000

= 2.69V peak (offset on LCDBIAS0 of 0.91V)

bit 2

MODE13:

1/3 LCD Bias Enable bit

= Regulator output supports 1/3 LCD Bias mode

= Regulator output supports Static LCD Bias mode

bit 1-0

CLKSEL<1:0>

: Regulator Clock Select Control bits

= LPRC 31 kHz

=8 MHz FRC

=SOSC

= Disable regulator and float regulator voltage output

Note 1:

When using the charge pump, the LCDBIASx pins and the VLCAP1/VLACAP2 pins should be made analog,

and the respective TRIS bits should be set as inputs.

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