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PIC24FJ128GA310 Datasheet(PDF) 276 Page - Microchip Technology |
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PIC24FJ128GA310 Datasheet(HTML) 276 Page - Microchip Technology |
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276 / 406 page ![]() PIC24FJ128GA310 FAMILY DS39996F-page 276 2010-2011 Microchip Technology Inc. 22.2 RTCC Module Registers The RTCC module registers are organized into three categories: • RTCC Control Registers • RTCC Value Registers • Alarm Value Registers 22.2.1 REGISTER MAPPING To limit the register interface, the RTCC Timer and Alarm Time registers are accessed through corresponding register pointers. The RTCC Value register window (RTCVALH and RTCVALL) uses the RTCPTR bits (RCFGCAL<9:8>) to select the desired Timer register pair (see Table 22-1). By writing the RTCVALH byte, the RTCC Pointer value, the RTCPTR<1:0> bits decrement by one until they reach ‘00’. Once they reach ‘00’, the MINUTES and SECONDS value will be accessible through RTCVALH and RTCVALL until the pointer value is manually changed. TABLE 22-1: RTCVAL REGISTER MAPPING The Alarm Value register window (ALRMVALH and ALRMVALL) uses the ALRMPTR bits (ALCFGRPT<9:8>) to select the desired Alarm register pair (see Table 22-2). By writing the ALRMVALH byte, the Alarm Pointer value, ALRMPTR<1:0> bits, decrement by one until they reach ‘00’. Once they reach ‘00’, the ALRMMIN and ALRMSEC value will be accessible through ALRMVALH and ALRMVALL until the pointer value is manually changed. TABLE 22-2: ALRMVAL REGISTER MAPPING Considering that the 16-bit core does not distinguish between 8-bit and 16-bit read operations, the user must be aware that when reading either the ALRMVALH or ALRMVALL bytes, the ALRMPTR<1:0> value will be decremented. The same applies to the RTCVALH or RTCVALL bytes with the RTCPTR<1:0> being decremented. 22.2.2 WRITE LOCK In order to perform a write to any of the RTCC Timer registers, the RTCWREN bit (RCFGCAL1<13>) must be set (see Example 22-1). 22.2.3 SELECTING RTCC CLOCK SOURCE The clock source for the RTCC module can be selected using the RTCLK<1:0> bits in the RTCPWC register. When the bits are set to ‘00’, the Secondary Oscillator (SOSC) is used as the reference clock and when the bits are ‘01’, LPRC is used as the reference clock. When RTCLK<1:0> = 10 and 11, the external power line (50 Hz and 60 Hz) is used as the clock source. EXAMPLE 22-1: SETTING THE RTCWREN BIT RTCPTR<1:0> RTCC Value Register Window RTCVAL<15:8> RTCVAL<7:0> 00 MINUTES SECONDS 01 WEEKDAY HOURS 10 MONTH DAY 11 — YEAR ALRMPTR <1:0> Alarm Value Register Window ALRMVAL<15:8> ALRMVAL<7:0> 00 ALRMMIN ALRMSEC 01 ALRMWD ALRMHR 10 ALRMMNTH ALRMDAY 11 —— Note: This only applies to read operations and not write operations. Note: To avoid accidental writes to the timer, it is recommended that the RTCWREN bit (RCFGCAL1<13>) is kept clear at any other time. For the RTCWREN bit to be set, there is only one instruction cycle time window allowed between the 55h/AA sequence and the setting of RTCWREN; therefore, it is recommended that code follow the procedure in Example 22-1. asm volatile(“push w7”); asm volatile(“push w8”); asm volatile(“disi #5”); asm volatile(“mov #0x55, w7”); asm volatile(“mov w7, _NVMKEY”); asm volatile(“mov #0xAA, w8”); asm volatile(“mov w8, _NVMKEY”); asm volatile(“bset _RCFGCAL1, #13”); //set the RTCWREN bit asm volatile(“pop w8”); asm volatile(“pop w7”); |
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