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PIC24FJ128GA310 Datasheet(PDF) 289 Page - Microchip Technology |
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PIC24FJ128GA310 Datasheet(HTML) 289 Page - Microchip Technology |
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289 / 406 page ![]() 2010-2011 Microchip Technology Inc. DS39996F-page 289 PIC24FJ128GA310 FAMILY 23.0 32-BIT PROGRAMMABLE CYCLIC REDUNDANCY CHECK (CRC) GENERATOR The 32-bit programmable CRC generator provides a hardware implemented method of quickly generating checksums for various networking and security applications. It offers the following features: • User-programmable CRC polynomial equation, up to 32 bits • Programmable shift direction (little or big-endian) • Independent data and polynomial lengths • Configurable interrupt output • Data FIFO Figure 23-1 displays a simplified block diagram of the CRC generator. A simple version of the CRC shift engine is displayed in Figure 23-2. FIGURE 23-1: CRC BLOCK DIAGRAM FIGURE 23-2: CRC SHIFT ENGINE DETAIL Note: This data sheet summarizes the features of this group of PIC24F devices. It is not intended to be a comprehensive reference source. For more information, refer to the “PIC24F Family Reference Manual ”, Section 41. “32-Bit Programmable Cyclic Redundancy Check (CRC)” (DS39729). The information in this data sheet supersedes the information in the FRM. CRC Interrupt Variable FIFO (4x32, 8x16 or 16x8) CRCDATH CRCDATL Shift Buffer CRC Shift Engine CRCWDATH CRCWDATL Shifter Clock 2 * FCY LENDIAN CRCISEL 1 0 FIFO Empty Event Shift Complete Event 1 0 Note 1: n = PLEN<4:1> + 1. CRC Shift Engine CRCWDATH CRCWDATL Bit 0 Bit 1 Bit n(1) X0 X1 Xn(1) Read/Write Bus Shift Buffer Data |
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