DSPIC33FJ64GP706 datasheet(215/322 Pages) MICROCHIP

215 / 322 page

DS70286C-page 213

dsPIC33FJXXXGPX06/X08/X10

CiTRmnCON: ECAN™ TX/RX BUFFER m CONTROL REGISTER (m = 0,2,4,6; n =

1,3,5,7)

R/W-0

R-0

R/W-0

TXENn

TXABTn

TXLARBn

TXERRn

TXREQn

RTRENn

TXnPRI<1:0>

bit 15

bit 8

R/W-0

R-0

R/W-0

TXENm

TXABTm(1) TXLARBm(1) TXERRm(1)

TXREQm

RTRENm

TXmPRI<1:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-8

See Definition for Bits 7-0, Controls Buffer n

bit 7

TXENm: TX/RX Buffer Selection bit

= Buffer TRBn is a transmit buffer

= Buffer TRBn is a receive buffer

bit 6

TXABTm: Message Aborted bit(1)

= Message was aborted

= Message completed transmission successfully

bit 5

TXLARBm: Message Lost Arbitration bit(1)

= Message lost arbitration while being sent

= Message did not lose arbitration while being sent

bit 4

TXERRm: Error Detected During Transmission bit(1)

= A bus error occurred while the message was being sent

= A bus error did not occur while the message was being sent

bit 3

TXREQm: Message Send Request bit

Setting this bit to ‘1’ requests sending a message. The bit will automatically clear when the message

is successfully sent. Clearing the bit to ‘0’ while set will request a message abort.

bit 2

RTRENm: Auto-Remote Transmit Enable bit

= When a remote transmit is received, TXREQ will be set

= When a remote transmit is received, TXREQ will be unaffected

bit 1-0

TXmPRI<1:0>: Message Transmission Priority bits

= Highest message priority

= High intermediate message priority

= Low intermediate message priority

= Lowest message priority

Note 1: This bit is cleared when TXREQ is set.

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