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PIC18F242 Datasheet(PDF) 281 Page - Microchip Technology

Part # PIC18F242
Description  High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D
PDF  332 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F242 Datasheet(HTML) 281 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
DS39564C-page 279
PIC18FXX2
FIGURE 22-13:
EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
TABLE 22-12: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
Param.
No.
Symbol
Characteristic
Min
Max Units Conditions
71
TscH
SCK input high time
(Slave mode)
Continuous
1.25 TCY + 30
—
ns
71A
Single Byte
40
—
ns
(Note 1)
72
TscL
SCK input low time
(Slave mode)
Continuous
1.25 TCY + 30
—
ns
72A
Single Byte
40
—
ns
(Note 1)
73
TdiV2scH,
TdiV2scL
Setup time of SDI data input to SCK edge
100
—
ns
73A
TB2B
Last clock edge of Byte1 to the 1st clock edge of Byte2
1.5 TCY + 40
—
ns
(Note 2)
74
TscH2diL,
TscL2diL
Hold time of SDI data input to SCK edge
100
—
ns
75
TdoR
SDO data output rise time
PIC18FXXX
—
25
ns
PIC18LFXXX
—
60
ns
VDD = 2V
76
TdoF
SDO data output fall time
PIC18FXXX
—
25
ns
PIC18LFXXX
—
60
ns
VDD = 2V
78
TscR
SCK output rise time (Master mode) PIC18FXXX
—
25
ns
PIC18LFXXX
—
60
ns
VDD = 2V
79
TscF
SCK output fall time (Master mode) PIC18FXXX
—
25
ns
PIC18LFXXX
—
60
ns
VDD = 2V
80
TscH2doV,
TscL2doV
SDO data output valid after SCK
edge
PIC18FXXX
—
50
ns
PIC18LFXXX
—
150
ns
VDD = 2V
81
TdoV2scH,
TdoV2scL
SDO data output setup to SCK edge
TCY
—ns
Note 1: Requires the use of Parameter # 73A.
2: Only if Parameter # 71A and # 72A are used.
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
81
71
72
74
75, 76
78
80
MSb
79
73
MSb In
bit6 - - - - - -1
LSb In
bit6 - - - -1
LSb
Note:
Refer to Figure 22-4 for load conditions.



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