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PIC18F242 Datasheet(PDF) 165 Page - Microchip Technology

Part # PIC18F242
Description  High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D
PDF  332 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F242 Datasheet(HTML) 165 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
DS39564C-page 163
PIC18FXX2
15.4.17.3
Bus Collision During a STOP
Condition
Bus collision occurs during a STOP condition if:
a)
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
b)
After the SCL pin is de-asserted, SCL is
sampled low before SDA goes high.
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data '0' (Figure 15-31). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master
attempting to drive a data '0' (Figure 15-32).
FIGURE 15-31:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 15-32:
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDA
SCL
BCLIF
PEN
P
SSPIF
TBRG
TBRG
TBRG
SDA asserted low
SDA sampled
low after TBRG,
Set BCLIF
'0'
'0'
SDA
SCL
BCLIF
PEN
P
SSPIF
TBRG
TBRG
TBRG
Assert SDA
SCL goes low before SDA goes high
Set BCLIF
'0'
'0'



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