PIC17C752-08SLASHCL datasheet(163/328 Pages) MICROCHIP

163 / 328 page

DS30289A-page 163

PIC17C7XX

15.2.13 ACKNOWLEDGE SEQUENCE TIMING

An acknowledge sequence is enabled by setting the

acknowledge

sequence

enable

bit,

ACKEN

(SSPCON2<4>). When this bit is set, the SCL pin is

pulled low and the contents of the acknowledge data

bit is presented on the SDA pin. If the user wishes to

generate an acknowledge, then the ACKDT bit should

be cleared. If not, the user should set the ACKDT bit

before starting an acknowledge sequence. The baud

rate generator then counts for one rollover period

(TBRG), and the SCL pin is de-asserted (pulled high).

When the SCL pin is sampled high (clock arbitration),

the baud rate generator counts for TBRG . The SCL pin

is then pulled low. Following this, the ACKEN bit is

automatically cleared, the baud

rate generator is

turned off, and the SSP module then goes into IDLE

mode. (Figure 15-32)

15.2.13.1 WCOL STATUS FLAG

If the user writes the SSPBUF when an acknowledege

sequence is in progress, then WCOL is set and the

contents of the buffer are unchanged (the write doesn’t

occur).

FIGURE 15-32: ACKNOWLEDGE SEQUENCE WAVEFORM

Note: T

BRG= one baud rate generator period.

SDA

SCL

Set SSPIF at the end

Acknowledge sequence starts here,

Write to SSPCON2

ACKEN automatically cleared

Cleared in

BRG

of receive

ACK

ACKEN = 1, ACKDT = 0

SSPIF

software

Set SSPIF at the end

of acknowledge sequence

Cleared in

software

PIC17C752-08/CL Datasheet(PDF) 163 Page - Microchip Technology

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