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PIC18C658T-E/CL Datasheet(PDF) 136 Page - Microchip Technology |
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PIC18C658T-E/CL Datasheet(HTML) 136 Page - Microchip Technology |
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136 / 366 page ![]() PIC18CXX8 DS30475A-page 136 Advanced Information 2000 Microchip Technology Inc. 15.2 Control Registers The MSSP module has three associated registers. These include a status register and two control registers. Register 15-1 shows the MSSP Status Register (SSPSTAT), Register 15-2 shows the MSSP Control Register 1 (SSPCON1), and Register 15-3 shows the MSSP Control Register 2 (SSPCON2). REGISTER 15-1: SSPSTAT REGISTER R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0 SMP CKE D/A PS R/W UA BF bit 7 bit 0 bit 7 SMP: Sample bit SPI Master mode 1 = Input data sampled at end of data output time 0 = Input data sampled at middle of data output time SPI Slave mode SMP must be cleared when SPI is used in Slave mode In I2C Master or Slave mode: 1 = Slew rate control disabled for standard speed mode (100 kHz and 1 MHz) 0 = Slew rate control enabled for high speed mode (400 kHz) bit 6 CKE: SPI Clock Edge Select CKP = 0 1 = Data transmitted on rising edge of SCK 0 = Data transmitted on falling edge of SCK CKP = 1 1 = Data transmitted on falling edge of SCK 0 = Data transmitted on rising edge of SCK bit 5 D/A: Data/Address bit (I2C mode only) 1 = Indicates that the last byte received or transmitted was data 0 = Indicates that the last byte received or transmitted was address bit 4 P: STOP bit (I2C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.) 1 = Indicates that a STOP bit has been detected last (this bit is ’0’ on RESET) 0 = STOP bit was not detected last bit 3 S: START bit (I2C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.) 1 = Indicates that a START bit has been detected last (this bit is ’0’ on RESET) 0 = START bit was not detected last bit 2 R/W: Read/Write bit information (I2C mode only) This bit holds the R/W bit information following the last address match. This bit is only valid from the address match to the next START bit, STOP bit, or not ACK bit. In I2C Slave mode: 1 = Read 0 = Write In I2C Master mode: 1 = Transmit is in progress 0 = Transmit is not in progress OR-ing this bit with SEN, RSEN, PEN, RCEN, or ACKEN will indicate if the MSSP is in IDLE mode. |
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