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PIC18C658T-E/CL Datasheet(PDF) 190 Page - Microchip Technology |
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PIC18C658T-E/CL Datasheet(HTML) 190 Page - Microchip Technology |
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190 / 366 page  PIC18CXX8 DS30475A-page 190 Advanced Information 2000 Microchip Technology Inc. 17.2.2 CAN TRANSMIT BUFFER REGISTERS This section describes the CAN Transmit Buffer Register and the associated Transmit Buffer Control Registers. REGISTER 17-4: TXBnCON – TRANSMIT BUFFER n CONTROL REGISTER REGISTER 17-5: TXBnSIDH:TRANSMITBUFFERnSTANDARDIDENTIFIERHIGHBYTEREGISTER U-0 R-0 R-0 R-0 R/W-0 U-0 R/W-0 R/W-0 — TXABT TXLARB TXERR TXREQ — TXPRI1 TXPRI0 bit 7 bit 0 bit 7 Unimplemented: Read as ’0’ bit 6 TXABT: Transmission Aborted Status bit 1 = Message was aborted 0 = Message was not aborted bit 5 TXLARB: Transmission Lost Arbitration Status bit 1 = Message lost arbitration while being sent 0 = Message did not lose arbitration while being sent bit 4 TXERR: Transmission Error Detected Status bit 1 = A bus error occurred while the message was being sent 0 = A bus error did not occur while the message was being sent bit 3 TXREQ: Transmit Request Status bit 1 = Requests sending a message. Clears the TXABT, TLARB, and TXERR bits 0 = Automatically cleared when the message is successfully sent Note: Clearing this bit in software, while the bit is set, will request a message abort. bit 2 Unimplemented: Read as ’0’ bit 1-0 TXPRI1:TXPRI0: Transmit Priority bits 11 = Priority Level 3 (Highest Priority) 10 = Priority Level 2 01 = Priority Level 1 00 = Priority Level 0 (Lowest Priority) Note: These bits set the order in which Transmit buffer will be transferred. They do not alter CAN message identifier. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 bit 7 bit 0 bit 7-0 SID10:SID3: Standard Identifier bits, if EXIDE = 0 (TXBnSID Register). Extended Identifier bits EID28:EID21, if EXIDE = 1. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown |
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