| Electronic Components Datasheet Search |
|
PIC16F84A-10/SS Datasheet(PDF) 115 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC16F84A-10/SS Datasheet(HTML) 115 Page - Microchip Technology |
|
115 / 124 page ![]() PIC16F8X © 1998 Microchip Technology Inc. DS30430C-page 115 APPENDIX E: CONVERSION CONSIDERATIONS - PIC16C84 TO PIC16F83/F84 AND PIC16CR83/CR84 Considerations for converting from the PIC16C84 to the PIC16F84 are listed in the table below. These con- siderations apply to converting from the PIC16C84 to the PIC16F83 (same as PIC16F84 except for program and data RAM memory sizes) and the PIC16CR84 and PIC16CR83 (ROM versions of Flash devices). Devel- opment Systems support is available for all of the PIC16X8X devices. Difference PIC16C84 PIC16F84 The polarity of the PWRTE bit has been reversed. Ensure that the pro- grammer has this bit correctly set before programming. PWRTE PWRTE The PIC16F84 (and PIC16CR84) have larger RAM sizes. Ensure that this does not cause an issue with your program. RAM = 36 bytes RAM = 68 bytes The MCLR pin now has an on-chip filter. The input signal on the MCLR pin will require a longer low pulse to generate an interrupt. MCLR pulse width (low) = 350ns; 2.0V ≤ VDD ≤ 3.0V = 150ns; 3.0V ≤ VDD ≤ 6.0V MCLR pulse width (low) = 1000ns; 2.0V ≤ VDD ≤ 6.0V Some electrical specifications have been improved (see IPD example). Compare the electrical specifica- tions of the two devices to ensure that this will not cause a compatibil- ity issue. IPD (typ @ 2V) = 26 µA IPD (max @ 4V, WDT disabled) =100 µA (PIC16C84) =100 µA (PIC16LC84) IPD (typ @ 2V) < 1 µA IPD (max @ 4V, WDT disabled) =14 µA (PIC16F84) =7 µA (PIC16LF84) PORTA and crystal oscillator values less than 500kHz For crystal oscillator configurations operating below 500kHz, the device may generate a spurious internal Q- clock when PORTA<0> switches state. N/A RB0/INT pin TTL TTL/ST* (* This buffer is a Schmitt Trigger input when configured as the exter- nal interrupt.) EEADR<7:6> and IDD It is recommended that the EEADR<7:6> bits be cleared. When either of these bits is set, the maximum IDD for the device is higher than when both are cleared. N/A Code Protect 1 CP bit 9 CP bits Recommended value of REXT for RC oscillator circuits REXT = 3k Ω - 100kΩ REXT = 5k Ω - 100kΩ GIE bit unintentional enable If an interrupt occurs while the Glo- bal Interrupt Enable (GIE) bit is being cleared, the GIE bit may unin- tentionally be re-enabled by the user’s Interrupt Service Routine (the RETFIE instruction). N/A |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |