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EM341-RTR Datasheet(PDF) 158 Page - Silicon Laboratories |
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EM341-RTR Datasheet(HTML) 158 Page - Silicon Laboratories |
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158 / 237 page  EM341 Rev 1.0 159 TIM_IC3F [7:4] RW Input Capture 3 Filter. (Applies only if TIM_CC3S > 0.) See TIM_IC4F description above. TIM_IC3PSC [3:2] RW Input Capture 3 Prescaler. (Applies only if TIM_CC3S > 0.) See TIM_IC4PSC description above. TIM_CC3S [1:0] RW Capture / Compare 3 Selection. This configures the channel as an output or an input. If an input, it selects the input source. 00: Channel is an output. 01: Channel is an input and is mapped to TI3. 10: Channel is an input and is mapped to TI4. 11: Channel is an input and is mapped to TRGI. This requires an internal trigger input selected by the TIM_TS bit in the TIM_SMCR register. Note: TIM_CC3S may be written only when the channel is off (TIM_CC3E = 0 in the TIMx_CCER register). Bitname Bitfield Access Description |
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