EM357-RTR datasheet(221/241 Pages) SILABS

221 / 241 page

Rev 1.3

221

PC1

I/O

Digital I/O

ADC3

Analog

ADC Input 3

Enable analog function with GPIO_PCCFGL[7:4]

SWO

(see also Pin 33)

Serial Wire Output asynchronous trace output to debugger

Select asynchronous trace interface in ARM core

Enable trace interface in ARM core

Select alternate output function with GPIO_PCCFGL[7:4]

TRACEDATA0

Synchronous CPU trace data bit 0

Select 1-, 2- or 4-wire synchronous trace interface in ARM core

Enable trace interface in ARM core

Select alternate output function with GPIO_PCCFGL[7:4]

VDD_MEM

Power

1.8 V supply (flash, RAM)

PC0

I/O

High

current

Digital I/O

Either enable with GPIO_DBGCFG[5],



or enable Serial Wire mode (see JTMS description, Pin 35) and disable

TRACEDATA1

JRST

JTAG reset input from debugger

Selected when in JTAG mode (default mode, see JTMS description) and

TRACEDATA1 is disabled

Internal pull-up is enabled

IRQD

Default external interrupt source D.

IRQC and IRQD external interrupts can be mapped to any digital I/O pin

using the GPIO_IRQSEL and GPIO_IRQDSEL registers.

TRACEDATA1

Synchronous CPU trace data bit 1

Select 2- or 4-wire synchronous trace interface in ARM core

Enable trace interface in ARM core

Select alternate output function with GPIO_PCCFGL[3:0]

PB7

I/O

High

current

Digital I/O

ADC2

Analog

ADC Input 2

Enable analog function with GPIO_PBCFGH[15:12]

IRQC

Default external interrupt source C.

IRQC and IRQD external interrupts can be mapped to any digital I/O pin

using the GPIO_IRQSEL and GPIO_IRQDSEL registers.

TIM1C2

Timer 1 channel 2 output

Enable timer output in TIM1_CCER

Select alternate output function with GPIO_PBCFGH[15:12]

TIM1C2

Timer 1 channel 2 input

Cannot be remapped

Table 19.1. EM35x Pin Descriptions (Continued)

Pin #

Signal

Direction

Description

EM357-RTR Datasheet(PDF) 221 Page - Silicon Laboratories

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