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ST72321R7-Auto Datasheet(PDF) 240 Page - STMicroelectronics |
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ST72321R7-Auto Datasheet(HTML) 240 Page - STMicroelectronics |
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240 / 243 page ![]() Known limitations ST72321xx-Auto 240/243 Doc ID 13829 Rev 1 22.1.9 TIMD set simultaneously with OC interrupt If the 16-bit timer is disabled at the same time the output compare event occurs, the output compare flag then gets locked and cannot be cleared before the timer is enabled again. Impact on the application If the output compare interrupt is enabled, then the output compare flag cannot be cleared in the timer interrupt routine. Consequently, the interrupt service routine is called repeatedly. Workaround Disable the timer interrupt before disabling the timer. Again while enabling, first enable the timer, then the timer interrupts. ● Perform the following to disable the timer: – TACR1 or TBCR1 = 0x00h; // Disable the compare interrupt – TACSR | or TBCSR | = 0x40; // Disable the timer ● Perform the following to enable the timer again: – TACSR & or TBCSR & = ~0x40; // Enable the timer – TACR1 or TBCR1 = 0x40; // Enable the compare interrupt 22.1.10 I2C multimaster In multimaster configurations, if the ST7 I2C receives a START condition from another I2C master after the START bit is set in the I2CCR register and before the START condition is generated by the ST7 I2C, it may ignore the START condition from the other I2C master. In this case, the ST7 master will receive a NACK from the other device. On reception of the NACK, ST7 can send a restart and Slave address to re-initiate communication. 22.1.11 Readout protection with LVD The LVD is not supported if readout protection is enabled 22.2 All Flash devices 22.2.1 Internal RC oscillator with LVD The internal RC can only be used if LVD is enabled. 22.3 Limitations specific to ROM devices 22.3.1 LVD operation Depending on the operating conditions, especially the VDD ramp up speed and ambient temperature, in some cases the LVD may not start. When this occurs, the MCU may operate outside the guaranteed functional area (see Figure 73) without being forced into reset state. In this case, proper use of the watchdog may make it possible to recover through a watchdog reset and allow normal operations to resume. |
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