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ST72561J4-Auto Datasheet(PDF) 275 Page - STMicroelectronics |
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ST72561J4-Auto Datasheet(HTML) 275 Page - STMicroelectronics |
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275 / 324 page ![]() ST72561-Auto Electrical characteristics Doc ID 12370 Rev 8 275/324 20.3 Operating conditions 20.3.1 General operating conditions Figure 120. fCPU maximum vs VDD 20.3.2 Operating conditions with low voltage detector (LVD) Subject to general operating conditions for TA. Symbol Parameter Conditions Min Max Unit fCPU Internal clock frequency 0 8 MHz VDD Extended operating voltage No Flash write/ erase. Analog parameters not guaranteed. 3.8 4.5 V Standard operating voltage 4.5 5.5 Operating voltage for flash write/ erase VPP = 11.4 to 12.6V TA Ambient temperature range A Suffix version -40 85 °C C Suffix version 125 fCPU [MHz] SUPPLY VOLTAGE [V] 8 4 2 1 0 3.5 4.0 4.5 5.0 FUNCTIONALITY FUNCTIONALITY GUARANTEED IN THIS AREA NOT GUARANTEED IN THIS AREA 3.8 6 5.5 FUNCTIONALITY GUARANTEED IN THIS AREA UNLESS OTHERWISE SPECIFIED IN THE TABLES OF PARAMETRIC DATA Symbol Parameter Conditions Min Typ Max Unit VIT+(LVD) Reset release threshold (VDD rise) 4.0(1) 1. Data based on characterization results, not tested in production. 4.2 4.5 V VIT-(LVD) Reset generation threshold (VDD fall) 3.8 4.0 4.25(1) Vhys(LVD) LVD voltage threshold hysteresis (1) VIT+(LVD)-VIT-(LVD) 150 200 250 mV VtPOR VDD rise time rate (1) 6µs/V 100 ms/V tg(VDD) VDD glitches filtered (not detected) by LVD(1) Measured at VIT-(LVD) 40 ns |
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