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ST72561AR7-Auto Datasheet(PDF) 191 Page - STMicroelectronics

Part # ST72561AR7-Auto
Description  Clock, reset and supply management
PDF  324 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561AR7-Auto Datasheet(HTML) 191 Page - STMicroelectronics

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ST72561-Auto
LINSCI serial communication interface (LIN master/slave)
Doc ID 12370 Rev 8
191/324
1.
When initializing LDIV, the LPFR register must be written first. Then, the write to the
LPR register will effectively update LDIV and so the clock generation.
2.
In LIN slave mode, if the LPR[7:0] register is equal to 00h, the transceiver and receiver
input clocks are switched off.
Examples of LDIV coding:
Example 1:
LPR = 27d and LPFR = 12d
This leads to:
Mantissa (LDIV) = 27d
Fraction (LDIV) = 12/16 = 0.75d
Therefore LDIV = 27.75d
Example 2:
LDIV = 25.62d
This leads to:
LPFR = rounded(16*0.62d) = rounded(9.92d) = 10d = Ah
LPR = mantissa (25.620d) = 25d = 1Bh
Example 3:
LDIV = 25.99d
This leads to:
LPFR = rounded(16*0.99d) = rounded(15.84d) = 16d
The carry must be propagated to the mantissa:
LPR = mantissa (25.99) + 1 = 26d = 1Ch
Table 68.
LDIV fraction
LPFR[3:0]
Fraction (LDIV)
0h
0
1h
1/16
...
...
Eh
14/16
Fh
15/16



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