STM32F769AI datasheet(218/255 Pages) STMICROELECTRONICS

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Electrical characteristics

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DocID029041 Rev 4

Figure 77. DCMI timing diagram

5.3.33

LCD-TFT controller (LTDC) characteristics

Unless otherwise specified, the parameters given in Table 121 for LCD-TFT are derived

from tests performed under the ambient temperature, fHCLK frequency and VDD supply

voltage summarized in Table 17, with the following configuration:

•

LCD_CLK polarity: high

•

LCD_DE polarity: low

•

LCD_VSYNC and LCD_HSYNC polarity: high

•

Pixel formats: 24 bits

Table 121. LTDC characteristics (1)

1. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

fCLK

LTDC clock output frequency

MHz

DCLK

LTDC clock output duty cycle

tw(CLKH),

tw(CLKL)

Clock High time, low time

tw(CLK)/2−0.5 tw(CLK)/2+0.5

tv(DATA)

Data output valid time

th(DATA)

Data output hold time

tv(HSYNC),

tv(VSYNC),

tv(DE)

HSYNC/VSYNC/DE output valid time

3.5

th(HSYNC),

th(VSYNC),

th(DE)

HSYNC/VSYNC/DE output hold time

0.5

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