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STM32F769AI Datasheet(PDF) 224 Page - STMicroelectronics |
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STM32F769AI Datasheet(HTML) 224 Page - STMicroelectronics |
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224 / 255 page ![]() Electrical characteristics STM32F765xx STM32F767xx STM32F768Ax STM32F769xx 224/255 DocID029041 Rev 4 Table 123. Dynamic characteristics: SD / MMC characteristics, VDD=2.7V to 3.6V(1) Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 50 MHz - SDMMC_CK/fPCLK2 frequency ratio - - - 8/3 - tW(CKL) Clock low time fpp =50 MHz 9.5 10.5 - ns tW(CKH) Clock high time fpp =50 MHz 8.5 9.5 - CMD, D inputs (referenced to CK) in MMC and SD HS mode tISU Input setup time HS fpp =50 MHz 3.5 - - ns tIH Input hold time HS fpp =50 MHz 2.5 - - CMD, D outputs (referenced to CK) in MMC and SD HS mode tOV Output valid time HS fpp =50 MHz - 11 12 ns tOH Output hold time HS fpp =50 MHz 9 - - CMD, D inputs (referenced to CK) in SD default mode tISUD Input setup time SD fpp =25 MHz 3.5 - - ns tIHD Input hold time SD fpp =25 MHz 2.5 - - CMD, D outputs (referenced to CK) in SD default mode tOVD Output valid default time SD fpp =25 MHz - 0.5 1.5 ns tOHD Output hold default time SD fpp =25 MHz 0- - 1. Guaranteed by characterization results. Table 124. Dynamic characteristics: eMMC characteristics, VDD=1.71V to 1.9V(1)(2) Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 50 MHz - SDMMC_CK/fPCLK2 frequency ratio - - - 8/3 - tW(CKL) Clock low time fpp =50 MHz 9.5 10.5 - ns tW(CKH) Clock high time fpp =50 MHz 8.5 9.5 - CMD, D inputs (referenced to CK) in eMMC mode tISU Input setup time HS fpp =50 MHz 3 - - ns tIH Input hold time HS fpp =50 MHz 4 - - CMD, D outputs (referenced to CK) in eMMC mode tOV Output valid time HS fpp =50 MHz - 11 15.5 ns tOH Output hold time HS fpp =50 MHz 9.5 - - 1. Guaranteed by characterization results. 2. Cload = 20 pF. |
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