1. General description
The 74AHC1G79; 74AHCT1G79 is a single positive-edge triggered D-type flip-flop. Data at the
D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will
be stored in the flip-flop and appear at the Q output. Inputs are overvoltage tolerant. This feature
allows the use of these devices as translators in mixed voltage environments.
2. Features and benefits
• Wide supply voltage range from 2.0 to 5.5 V
• Overvoltage tolerant inputs to 5.5 V
• High noise immunity
• CMOS low power dissipation
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
• Symmetrical output impedance
• Balanced propagation delays
• Input levels:
• For 74AHC1G79: CMOS level
• For 74AHCT1G79: TTL level
• ESD protection:
• HBM JESD22-A114F: exceeds 2000 V
• MM JESD22-A115-A: exceeds 200 V
• CDM JESD22-C101C: exceeds 1000 V
• Specified from -40 °C to +125 °C