1 General description
PF5030 is a power management integrated circuit (PMIC) designed for S32Z2/E2 processors. Its input voltage of up to 5.25 V maximum makes it ideal to work in conjunction with NXP front system supply families (FS86, FS6x) or any other front supply in the automotive drive train market.
Built-in One-Time Programmable (OTP) memory stores key start-up configurations, drastically reducing external components typically used to set output voltage and sequence of external regulators. Regulator parameters are adjustable through I2C after start-up, offering flexibility for different system states.

2 Features and benefits
Voltage Range
• 5.25 V DC maximum operating voltage
• Support operating voltage range down to 3.3 V
• Low power OFF mode with low sleep current (15 μA typical)
Power Supplies
• BUCK1/2: Low voltage integrated synchronous buck converter
– Configurable output voltage from 0.7 V to 1.5 V and current capability up to 3.5 A DC
– Capable of multiphase operation for up to 7.0 A DC
• BUCK3: Low voltage integrated synchronous buck converter
– Configurable output voltage from 1.0 V to 4.1 V and current capability up to 2.5 A DC
• LDO1/2: Low voltage LDO regulator for MCU I/O and system peripheral
– Configurable Output voltage from 1.1 V to 4.1 V and current capability up to 400 mA DC
System support
• 1x input pin for power-ON detection, 1.8 V, 3.3 V, and 5.0 V compatible
• Analog multiplexer with full system voltages and temperature monitoring
• Enhanced leader / follower power-up sequencing management through XFAILB pin
• 10 ms optional RSTB release delay during power-up for certain MCU compliance
• Device control via 32 bits I2C interface with 8-bit CRC
Compliancy
• EMC optimization techniques on switching regulators including spread spectrum and manual frequency tuning
• EMI robustness supporting various automotive EMI test standards
• Conducted emission: IEC 61967-4
• Conducted immunity: IEC 62132-4
Functional Safety
• ASIL D capability on safety goal 1 (SG1/CSG_01) on UV/OV for all S32Z2/E2 power rails (0.8 V, 1.1 V, 1.8 V, and 3.3 V)
• Configurable ASIL from QM to ASIL D on safety goal 2 (SG2/CSG_02) on MCU monitoring function
(watchdog)
• Independent voltage monitoring circuitry
• Up to 6 voltage monitoring inputs with 1.0 % target accuracy
• Logical and analog built-in self-test (LBIST/ABIST)
• Safety outputs with latent fault detection mechanism (PGOOD, RSTB, FS0B)
Configuration and enablement
• QFN 40 pins with exposed pad for optimized thermal management
• OTP programming for device customization

3 Applications
• EV propulsion and power train domain controller
• Chassis-integrated systems
• S32Z2/E2 companion chip