1FEATURES
• 32-Megabit Flash for High-Temperature
Applications
• Serial Peripheral Interface (SPI) Compatible
(Mode 0 and 3)
• 3.3-V Supply for IO, 1.9 V for Core
• 2-M x 16-Bit Word Access
• Asynchronous Read, Write, and Erase
Operations
• Erase Operation Supported Only for -55°C to
125°C
• 12-MHz Maximum Clock Frequency
• Endurance: 1000 Program and Erase Cycles
• Data Retention: 1000 hrs
• ESD Protection: 2-kV HBM, 500-V CDM
• 8-mm x 20-mm 14-Pin Ceramic HKN Package
and KGD (Bare Die) Package

SUPPORTS EXTREME TEMPERATURE
APPLICATIONS
• Controlled Baseline
• One Assembly and Test Site
• One Fabrication Site
• Available in Extreme (–55°C to 210°C)
Temperature Range (1)
• Extended Product Life Cycle
• Extended Product-Change Notification
• Product Traceability
• Texas Instruments high temperature products
utilize highly optimized silicon (die) solutions
with design and process enhancements to
maximize performance over extended
temperatures. All devices are characterized
and qualified for 1000 hours continuous
operating life at maximum rated temperature.

APPLICATIONS
• Down-Hole Energy Drilling
• Test and Measurement Equipment
• Seismic Data Collection at Extreme
Temperatures
• General Data Collection Applications at
Extreme High- and Low-Temperatures

DESCRIPTION
SM28VLT32 is a 32-Megabit Flash Memory designed to store program code and/or data from acquisition. The
wide temperature rating of this device makes it ideal for applications that need to perform reliably in harsh
environments. SM28VLT32 with its serial peripheral interface (SPI) offers low pin count for additional reliability
and easy assembly in these applications.
The memory is partitioned as sectors to provide addressing of 2-M words of 16 bits each. Thus, the memory
address is 21 bits wide.
SM28VLT32 supports serial peripheral interface to read/write/erase data in the flash memory. The interface is
compliant with mode 0 (CPOL = 0, CPHA = 0) and 3 (CPOL = 1, CPHA = 1). Asserting CS# enables the device
to enter communication mode. With CS# de-asserted, the device ignores all activity on the SPI pins. As shown in
Figure 1, multiple SM28VLT32 devices can be controlled from a single Master by independently controlling CS#
pins in order to realize larger memory in the application. Asserting the HOLD# pin (while CS# is also asserted)
will let the device ignore activity on the other SPI input pins (SCK and SI).