General description
The LPC55S2x/LPC552x is an ARM Cortex-M33 based microcontroller for embedded
applications. These devices include a CASPER Crypto/FFT engine, up to 256 KB of
on-chip SRAM, up to 512 KB on-chip flash, PRINCE module for on-the-fly flash
encryption/decryption, high-speed and full-speed USB host and device interface with
crystal-less operation for full-speed, SD/MMC/SDIO interface, five general-purpose
timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a
Windowed Watchdog Timer (WWDT), nine flexible serial communication peripherals
(which can be configured as a USART, SPI, high speed SPI, I2C, or I2S interface),
Programmable Logic Unit (PLU), one 16-bit 1.0 Msamples/sec ADC, comparator, and
temperature sensor.
To support security requirements, the LPC55S2x/LPC552x also offers support for secure
boot, HASH, AES, RSA, UUID, dynamic encrypt and decrypt, debug authentication, and
TBSA compliance.
Features and benefits
 ARM Cortex-M33 core (r0p3):
 Running at a CPU frequency of up to 150 MHz
 Memory Protection Unit (MPU).
 ARM Cortex M33 built-in Nested Vectored Interrupt Controller (NVIC).
 Non-maskable Interrupt (NMI) input with a selection of sources.
 Serial Wire Debug with eight breakpoints and four watch points. Includes Serial
Wire Output for enhanced debug capabilities.
 System tick timer.
 CASPER Crypto co-processor is provided to enable hardware acceleration for various
functions required for certain asymmetric cryptographic algorithms, such as, Elliptic
Curve Cryptography (ECC).
 On-chip memory:
 Up to 512 KB on-chip flash program memory with flash accelerator and 256 byte
page erase and write.
 Up to 256 KB total SRAM consisting of 32 KB SRAM on Code Bus, 208 KB SRAM
on System Bus (192 KB is contiguous), and additional 16 KB USB SRAM on
System Bus which can be used by the USB interface or for general purpose use.