20 / 44 page
CS5954AM
ADVANCE
INFORMATION
Document #: 38-08025 Rev. **
Page 20 of 44
4.14
General Timers and Watchdog Timer
The CS5954AM Controller has two built-in programmable timers that can provide an interrupt to the CS5954AM engine. The
timers decrement on every microsecond clock tick. An interrupt occurs when the timer reaches zero.
4.14.1
Timer 0 Count Register (0xC010: R/W)
The CS5954AM BIOS uses the timer 0 for time-out function and power-down mode. At the end of the power-up, the CS5954AM
BIOS disables the timer 0 interrupt. If you wish to use timer 0 for power-down function, see the [Ref. 1] SL11R_BIOS for more
information.
D15–0T15–0
Timer Count value.
4.14.2
Timer 1 Count Register (0xC012: R/W)
The CS5954AM timer 1 is for user applications. The CS5954AM BIOS does not use this timer.
D15–0T15–0
Timer Count value.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
T15
T14
T13
T12
T11
T10
T9
T8
T7
T6
T5
T4
T3
T2
T1
T0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
T15
T14
T13
T12
T11
T10
T9
T8
T7
T6
T5
T4
T3
T2
T1
T0
Unused Overlay
Memory Space
0x0000 to 0x0C00
Actual External
RAM
0x0C00 to 0x7FFF
SRAM (16K x 16)
or
SRAM (32K x 8)
Bit 12 (ROM Merge) of the Extended Memory Controller
Register = 0
Bit 12 (ROM Merge) of the Extended Memory Controller
Register = 1
Unused Overlay
Memory Space
0x8000 to 0x9FFF
Unused Overlay
Memory Space
0xA000 to 0xBFFF
Unused Overlay
Memory Space
0xC000 to 0xC0FF
Actual External
ROM
0xC100 to 0xE7FF
ROM (16Kx16)
or
ROM (32Kx8)
Actual
External
ROM
0x8000 to 0xBFFF
Unused Overlay
Memory Space
0xC000 to 0xC0FF
Actual External
ROM
0xC100 to 0xE7FF
ROM (16Kx16)
or
ROM (32Kx8)
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
