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74LX1G08 Datasheet(PDF) 1 Page - STMicroelectronics |
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74LX1G08 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page ![]() 1/10 October 2002 s 5V TOLERANT INPUTS s HIGH SPEED: tPD = 4.5ns (MAX.) at VCC =3V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA =25°C s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL = 24mA (MIN) at VCC =3V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 5.5V (1.2V Data Retention) s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LX1G08 is a low voltage CMOS SINGLE 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It is ideal for 1.65 to 5.5 VCC operations and low power and low noise applications. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power downprotectionis providedoninput and output and 0 to 7V can be accepted on inputs with no regard to the supply voltage. It can be interfaced to 5V signal environment for inputs in mixed 3.3/5V system. All inputs and outputs are equipped with protection circuits against static discharge. 74LX1G08 LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT INPUT PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-5L 74LX1G08STR SOT323-5L 74LX1G08CTR SC70-5 SOT23-5 |
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