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ST25DV04K Datasheet(PDF) 27 Page - STMicroelectronics |
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ST25DV04K Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 220 page ![]() DocID027603 Rev 4 27/220 ST25DV04K ST25DV16K ST25DV64K Memory management 219 4.2.1 User memory areas The user memory can be split into different areas, each one with a distinct access privilege. RF and I2C read and write commands are legal only within a same zone: • In RF, a multiple read or a multiple write command is not executed and returns the error code 0Fh if addresses cross the area borders. • In I2C, a read data always return FFh after crossing an area border. A write command is not acknowledged and not executed if the command crosses the area border. Each user memory area is defined by its ending block address ENDAi. The starting block address is defined by the end of the preceding area. There are three ENDAi registers in the configuration system memory, used to define the end block addresses of Area 1, Area 2 and Area 3. The end of Area 4 is always the last block of memory and is not configurable. Figure 8. ST25DVxxx user memory areas On factory delivery all ENDAi are set to maximum value, only Area1 exists and includes the full user memory. A granularity of 8 Blocks (32 Bytes) is offered to code area ending points. An area’s end limit is coded as followed in ENDAi registers: • Last RF block address of area = 8 x ENDAi + 7 => ENDAi = int(Last Areai RF block address / 8) • Last I2C byte address of area = 32 * ENDAi + 31 => ENDAi = int(Last Areai I2C byte address / 32) • As a consequence, ENDA1 = 0 means size of Area 1 is 8 blocks (32 Bytes). |
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